EN 21
SHA2.0U LA
6.
Block Diagrams, Testpoint Overviews, and Waveforms
Testpoint Overview (Top Side)
5V5_OUT
MCU+5V
VLCD
T1
5V5
5V
5V
1V8
1V / div DC
20us / div
SCL
DVD_B
200mV / div DC
20us / div
PH_L
20mV / div AC
1ms / div
DVD_RED
200mV / div DC
20us / div
T10
500mV / div DC
20us / div
T9
500mV / div DC
20us / div
DVD_G
200mV / div DC
20us / div
HSYNC
1V / div DC
20us / div
VSYNC
1V / div DC
5ms / div
T8
500mV / div DC
20us / div
SDA
1V / div DC
20us / div
5V5_OUT
A_MUTE
A_SW1
AV2_C
AV2_F
AV3_C
AV3_V/Y
AV4_V
D1
B5
E4
I6
I5
I6
I6
I6
AVHS
AVVS
BKLON
DVD_B
DVD_G
DVD_RED
HPLG_CTL
HSYNC
J6
J6
E2
L4
L5
L4
D4
C3
KEY-IN0
KEY-IN1
MCU+5V
MINT
N_C
N_C1
P_EN
P4_1
D4
D4
C2
I5
I6
I5
E2
D4
P6-3
PH_L
PH_R
PWMOUT
RMC-IN
RMC_SW
RSTN
SCL
D3
K7
K8
I1
D4
D4
E6
D6
SCL1
SCL2
SCL3
SCL4
SDA
T1
T2
T3
D6
D6
D6
D6
D6
I2
J4
J4
T4
T5
T6
T7
T8
T9
T10
T11
J4
K4
K3
K3
K3
K3
K4
L3
T12
T14
T15
T22
T23
T24
T25
T26
K3
K3
K3
J3
J3
J4
J4
J4
T27
T28
T29
T30
T31
T44
T46
T56
K5
K5
K5
K4
K5
H6
G1
G4
T57
T58
T59
T60
T61
T62
T63
T64
T65
T66
T67
T68
T69
T70
T71
T72
T73
T74
T75
T78
T81
T82
T83
T84
T87
T88
T94
T95
T96
T97
T98
T103
T110
T111
TUNER_AFC
TV_AUDIO
TV_SIF
TV2
VCC_33
VGA/HDMI_SW
VIDEO_OUT_SW
VLCD
VSYNC
YUV/DVD_SW
G4
G4
G4
G4
G3
G5
G5
F5
E2
E3
E3
E3
E3
E3
E3
E3
E3
E3
E3
C3
D8
D8
E8
E8
D8
D9
D10
E10
E10
E10
D10
K6
F6
F7
E2
D7
D7
J7
G1
E4
C3
F2
C3
E3
A
B
C
D
E
F
G
H
I
J
K
L
A
B
C
D
E
F
G
H
I
J
K
L
1
8
6
4
10
9
5
2
11
3
7
12
1
8
6
4
10
9
5
2
11
3
7
12
PH_R
20mV / div AC
1ms / div