VMP2
Configuration
ID 24855, Rev. 02
Page 4 - 18
© 2002 PEP Modular Computers GmbH
4.3.4.11 UART B / Registers
For a detailed description please refer to the EXAR XR16C 2850 DUART manual
The UART B occupies the following addresses:
.
Table 4-18: General Register Set (THR/RHR, IER/ISR, MCR/MSR, LCR/LSR, SPR)
Read Mode
Write Mode
Address
Receive Holding register
Transmit Holding Register
0xFFE0 0008
--
Interrupt Enable Register
0xFFE0 0009
Interrupt Status register
FIFO Control Register
0xFFE0 000A
--
Line Control Register
0xFFE0 000B
--
Modem Control Register
0xFFE0 000C
Line Status register
--
0xFFE0 000D
Modem Status register
--
0xFFE0 000E
Scratchpad register
Scratchpad Register
0xFFE0 000F
Table 4-19: Baud Rate Register Set (DLL/DLM)
Read Mode
Write Mode
Address
LSB of divisor latch
LSB of divisor latch
0xFFE0 0008
MSB of divisor latch
MSB of divisor latch
0xFFE0 0009
Table 4-20: Enhanced Register Set
Read Mode
Write Mode
Address
Trigger level register
Trigger level register
0xFFE0 0008
Feature Control register
Feature control register
0xFFE0 0009
Enhanced feature register
Enhanced feature register
0xFFE0 000A
Enhanced mode select register
Enhanced mode select register
0xFFE0 000F
Xon-1
Xon-1
0xFFE0 000C
Xon-2
Xon-2
0xFFE0 000D
Xoff-1
Xoff-1
0xFFE0 000E
Xoff-2
Xoff-2
0xFFE0 000F
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