PEP Modular Computers VMP2, Manual

Page: 69 / 142

VMP2 Configuration
ID 24855, Rev. 02 Page 4 - 17 © 2002 PEP Modular Computers GmbH
4.3.4.10 UART A / Registers
For a detailed description please refer to the EXAR XR16C 2850 DUART manual .
The UART A occupies the following addresses:
Table 4-15: General Register Set (THR/RHR, IER/ISR, MCR/MSR, LCR/LSR, SPR)
Read Mode Write Mode Address
Receive Holding Register
Transmit Holding Register
Interrupt Enable Register FFe0 0000
FFe0 0001
Interrupt Status Register
FIFO Control Register
Line Control Register (LCR)
Modem Control Register FFe0 0002
FFe0 0003
FFe0 0004
Line Status Register -- FFe0 0005
Modem Status Register -- FFe0 0006
Scratchpad Register Scratchpad Register FFe0 0007
Table 4-16: Baud Rate Register Set (DLL/DLM)
Read Mode Write Mode Address
LSB of divisor latch LSB of divisor latch FFe0 0000
MSB of divisor latch MSB of divisor latch FFe0 0001
Table 4-17: Enhanced Register Set
Read Mode Write Mode Address
Trigger Level Register Trigger Level Register FFe0 0000
Feature Control Register Feature Control Register FFe0 0001
Enhanced Feature Register Enhanced Feature Register FFe0 0002
Enhanced Mode Select Register
Enhanced Mode Select
Register
FFe0 0007
Xon-1 Xon-1 FFe0 0004
Xon-2 Xon-2 FFe0 0005
Xoff-1 Xoff-1 FFe0 0006
Xoff-2 Xoff-2 FFe0 0007
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