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3080/V24
124001UA
2-6
I
NSTALLATION
A
ND
O
PERATIONS
M
ANUAL
S
ETUP
& I
NSTALLATION
P
ATTON
E
LECTRONICS
C
O
.
RX Clock Source Selection (SW28-1,2,3)
RX Clock Source is selected by SW28-1, 2 and 3. The following table indicates the source
options provided by the 3080/V24 (CTS DSD-8). NOTE: If TXC Source is pin 24 That clock
will be used as the RXC also.
SW28-1
SW28-2
SW28-3
Source
ON
ON
ON
Master
OFF
ON
ON
Port 1
ON
OFF
ON
Port 2
OFF
OFF
ON
Port 3
ON
ON
OFF
Port 4
OFF
ON
OFF
Port 5
ON
OFF
OFF
Port 6
OFF
OFF
OFF
Internal
Tail Circuit Buffer (SW31-1)
(default ON)
The 3080/V24 (CTS DSD-8) has a Tail Circuit Buffer that is automatically selected when a
Sub-Channel is set as a DTE. The buffer will provide clock synchronization of the data from
the Sub-Channel to the Master Port for Tail Circuit operations. The buffer is de-activated when
the Sub-Channel is configured as a DCE. When operating in an asynchronous environment
the Buffer must be bypassed. To bypass the buffer in a synchronous or asynchronous
application, set switch SW31-1 to
OFF
(ASYNC). For normal operation in a synchronous
environment set SW31-1 to
ON
(SYNC). When using a tail circuit modem with the 3080/V24
(CTS DSD-8), the modem connected to the Sub-Channel, should be set to External Transmit
Clocking. The modem at the remote end of the connection should be set to RX-TX Clocking
or Slaved TX Clock. This will insure the same clock is present throughout the network and
clock slippage will not occur.