Panasonic SA-DT310, Service Manual

Page: 61 / 68

C2HBZG000007
IC401
AUDIO DSP
XI
XO
X401
(24.576MHz)
SA-DT310(E,EB,EG,EE) BLOCK DIAGRAM
23
SDI1
22
SDI0
17
SDO1
21
16
SDO0
19
20
SDIN3
SDIN1
SDIN2
2
MCLK IN
62 XTL OUT
XTL IN
DBSPD
M S
PLL FLT OUT
PLL FLT RET
SCLK
LRCK
MCLKOUT
DEM SEL1
DEM SEL2
63
17
30
4
5
23
24
22
29
28
CLOCK
PLL
AND
SERIAL
DATA
I/F
SIGNAL
PROCESSING
SERIAL
CONTROL
I/F
AUT
O
M
UTE
DE-EMPHASIS
SOFT
VOLUME
ERROR
RECOVER
Y
SOFT
MUTE
CLIP
DETECT
RESET
PWR DWN
AND
STATUS
SDA
SCL
CSO
/RST
/PDN
/CLIP
/MUTE
/ERR RCVY
13
14
15
9
12
18
11
10
POWER SUPPLY
3
+B7
AV
DD
PLL
48
DV
DD
RCL
45
DV
DD
PWM
44
DV
SS
PWM
47
DV
SS
RCL
OUTPUT
CONTROL
PWM CH.
PWM CH.
PWM CH.
PWM CH.
PWM CH.
PWM CH.
PWM
SECTION
PWM AP 1
PWM AM 1
59
58
57
VALID 1
PWM AP 2
PWM AM 2
56
55
54
VALID 2
PWM AP 3
PWM AM 3
53
52
51
VALID 3
PWM AP 4
PWM AM 4
43
42
41
VALID 4
PWM AP 5
PWM AM 5
40
39
38
VALID 5
PWM AP 6
PWM AM 6
37
36
35
VALID 6
C0ZBZ0000763
IC1501
PWM PROCESSOR
AP1
AM1
AP3
AM3
R ch
R ch
AP5
AM5
VALID 1
VALID 3
VALID 5
AP6
AM6
VALID 6
INTER-
FACE
C0JBAA000149
IC1702
HEADPHONES
AMP
NJM4580MTE1
IC1701
MUTING
Q1702
MUTING
CONT.
MUTING
CONT.
Q1703
D1702,1703
Q1701
+B5
HP
SW
MUTE
HEADPHONES
POWER
SUPPLY
Q1704
+B5
SCLK AD
AMP SDA
AMP SCL
AMP RESET
+B7
AND
GATE
LRCLK
C0JBAA000257
IC1504
AND
GATE
C0JBAA000257
IC1503
SCLK
MCLK AD
INVER-
TER
TC7SHU04FUTL
IC1502
MCLK
D1311
ERR RCVY
AMP SHUT
D1310
SD SURR
99
98
14
LRCKA
/RST
1
DSP
RST
/MICS
3
MICS
/MILP
4
MILP
/MIDIO
5
MIDIO
/MICK
6
MICK
MIACK
7
MIACK
13,35,
49,62,
81
V
SS
BCKA
15
SCLK
BCKOA
26
LRCKOA
25
24,53,
71
V
DD
+B7
27,28,
32,33
/TEST0~3
41
V
DD
A
INTER-
FACE
OPT 1
OPT 2
C0JBAS000076
IC202
34
RX
PLON
42
PLON
CKI
45
INVER-
TER
TC7SHU04FUTL
IC405
X402
(23.552MHz)
CKO
47
MCLK
LOCK
48
LOCK
V
DD
D1
90
V
DD
X
100
PO0
82
RST
DET
PO1
83
O
D
ATA
PO2
84
ST
A
TUS
V
SS
D1
V
SS
A
95 46
+B7 +B7
+B7
DV
DD
+B7
25
-B2