
PT-43LCX64/PT-50LCX64/PT-60LCX64
VIDEO SIGNAL PATH II BLOCK DIAGRAM (2/2)
3
2
1
Q5601
+5V
7
6
5
8
VCC
Q5607
Q5602
+5V
+5V
P5601-1
P5601-3
P5601-11
P5601-13
IC5306 (FPGA1)
P5302-14
D/D CONVERTER
(76MHz ---> 76MHz)
720P
CONVERTER
R DATA (8BIT)
G DATA (8BIT)
B DATA (8BIT)
V-SYNC
H-SYNC
H-SYNC
A/D H-SYNC
V
-SYNC
V
-SYNC
A/D H-SYNC
V
-SYNC
A/D CLOCK
CLOCK(76MHz)
CLOCK(76MHz)
A/D CLOCK
RGB SELECT
RGB SELECT
Q5604
Q5609
OSD
MIX
IC5311 (LVDS TRANSMITTER)
IC5302 (SCALER)
IC5303 (64M MEMORY)
47
P5302-15
48
P5302-11
45
P5302-12
46
P5302-8
41
P5302-9
42
P5302-2
37
P5302-3
38
P5302-5
39
P5302-6
P5601-5
40
175
178
176
11 15 16 17 123
182
122 120
6
7
8
9 10
110-112,115-119
147-154
82-84,86-89,93
109-116
150-152,160-164
192-194,198-202
56-58,61-64,68
41-43,46-49,55
29-31,33-36,40
2-4,6,7,54-56
8,10-12,14-16,18
19,20,22-25,27,28
IC5604 (FPGA2)
100-104,112-114
115-118,121-124
125,126,131-134,137,138
63-69,75
48-50,56-60
38-44,47
24,26-32
13-15,18,20-23
4-8,10-12
178-181,187-189,191
166-169,173-176
138-141,145-148
125-127,129,133-136
94-101
157-164
166-173
122-124,127-131
134,135,138-143
102 101
185
81 92
OSD DATA 0
OSD DATA 1
OSD DATA 2
OSD DATA 3
H-SYNC
V
-SYNC
CLOCK(76MHz)
CLOCK(76MHz)
OSD BLANKING
LVDS DATA A(+)
TO VIDEO III
SIGNAL PATH
BLOCK DIAGRAM
LVDS DATA A(-)
LVDS DATA B(+)
LVDS DATA B(-)
LVDS DATA C(+)
LVDS DATA C(-)
LVDS DATA D(+)
LVDS DATA D(-)
LVDS CLOCK(+)
LVDS CLOCK(-)
FROM
SYSTEM CONTROL
BLOCK DIAGRAM
64M
MEMORY
31
51
52
204
205
A/D H-SYNC
A/D CLOCK
V-SYNC
MULTI WINDOW
PICTURE IN PICTURE
SPLIT SCREEN
SEARCH
TTL PARALLEL
TO LVDS SERIAL
CONVERTER
PLL
OSD R MIX
D/D
CONVERTER
(76MH
Z
76MH
Z
)
OSD G MIX
OSD B MIX
VCC
9,26,34,44
+5V
IC5312
+3.3V
REG.
5
4
+3.3V
1,3,9,15,29,35,41,
43,49,55,75,81
VCC
+3.3V
1,10,24,36,46,54,68,76,
78,93,100,105,114,126,
137,145,180,201
VCC
3-8,11-15,18-22,25-30,
32-35,37,39-41,43,44
IC5304
17,42,61,83,86,108,
156,174,207
VCC
+3.3V
+2.5V
REG.
8
1
13
12
11
VCC
VCC
VCC
X5301
SPECTRUM
SPLITTER
A/D
CONVERTER
14
+3.3V
+1.8V
+3.3V
IC5309
1
2
4
5
+3.3V
76MHz
OSC
TP5309
VCC
13,26,38,53,66,78,
91,105,118,130,143,
156,171,184,196, 208
VCC
14,37,67,76,90,
119,128,142,
172,186,195
+3.3V
IC5305
+1.8V
REG.
1
3
V-SYNC
H-SYNC
V-SYNC
H-SYNC
V-SYNC
H-SYNC
IC5310 (OR GATE)
IC5601 (A/D CONVERTER)
MAIN VIDEO SIGNAL
SUB VIDEO SIGNAL
VIDEO SIGNAL(MAIN/SUB)
CARD Y/PB/PR SIGNAL
+3.3V
+3.3V
+5V
+5V
V-SYNC
H-SYNC
80
108
102
106
203
17
10
B
Q5612
B
CLAMP
2-9
Q5605
Q5610
P5601-7
A/D
CONVERTER
IC5602 (A/D CONVERTER)
17
10
B
Q5613
B
CLAMP
2-9
Q5606
Q5611
P5601-9
A/D
CONVERTER
VCC
VCC
OSD-R
OSD-G
OSD-B
FROM/TO VIDEO I
SIGNAL PATH
BLOCK DIAGRAM
OSD-YS
OSD-YM
OSD-H
OSD-V
VCC
IC5603 (A/D CONVERTER)
17
10
B
Q5614
B
CLAMP
2-9
IC5607 (INVERTER)
12
6
13
5
2
4
1
3
10
IC5606 (BUFFER)
4
2
5
11
8
14
19
20
9
97
98
76MHz CLOCK
OSD-V
OSD-H
OSD-YM
OSD-YS
CLAMP
129
139
141
141
142 3
77
76
76MHz CLOCK
52
VCC
VCC
17,36,53,72,98,
106,128,144
19,46,51,61,
88,120,130,135
14
13
+3.3V
+5V
VCC
VCC
19
20
14
13
+3.3V
+5V
VCC
VCC
19
20
14
13
REFERENCE VOLTAGE GENERATE CIRCUIT FOR A/D CONVERTER
IC5605 (OP AMP)
V-REF(H):2.7V
V-REF(L):2.3V
OSD D
AT
A
FR
OM DTV
TUNER UNIT
OSD D
AT
A
FR
OM MAIN MICR
OCONTR
OLLER
(IC6003)
VIDEO SIGNAL PATH II BLOCK DIAGRAM (2/2)
Summary of Contents for PT43LCX64 - MMD DIGITAL TUNER
Page 1: ......
Page 8: ...3 ABOUT LEAD FREE SOLDER PbF TOP PREVIOUS NEXT TOP PREVIOUS NEXT ...
Page 9: ...4 SERVICE NOTES TOP PREVIOUS NEXT TOP PREVIOUS NEXT ...
Page 10: ...5 DISASSEMBLY ASSEMBLY PROCEDURES TOP PREVIOUS NEXT 5 1 CABINET SECTION TOP PREVIOUS NEXT ...
Page 11: ...6 ADJUSTMENT PROCEDURES 1 TOP PREVIOUS NEXT TOP PREVIOUS NEXT ...
Page 12: ...7 TROUBLESHOOTING HINTS FOR BLOCK LEVEL REPAIR TOP PREVIOUS NEXT TOP PREVIOUS NEXT ...
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Page 110: ...TOP PREVIOUS NEXT ...