PAN9026 Wi-Fi/BT Module
4 Specification
Product Specification Rev. 0.1
Page 56
SDIO Timing Data
– DDR50 Mode (VIOSD 1.8V)
Symbol
Parameter
Condition
Min.
Typ.
Max.
Units
Clock
T
CLK
Clock time
50 MHz (max) between
rising edges
DDR50
20
ns
T
CR
, T
CF
Rise time, fall time
T
CR
, T
CF
< 4.00 ns (max)
at 50 MHz,
C
CARD
= 10 pF
DDR50
0.2 *
T
CLK
ns
Clock Duty
DDR50
45
55
%
CMD Input (referenced to clock rising edge)
T
IS
Input setup time
C
CARD
10 pF (1 card)
DDR50
6
ns
T
IH
Input hold time
C
CARD
10 pF (1 card)
DDR50
0.8
ns
CMD Output (referenced to clock rising edge)
T
ODLY
Output delay time during
data transfer mode
C
L
30 pF (1 card)
DDR50
13.7
ns
T
OHLD
Output hold time
C
L
≥ 15 pF (1 card)
DDR50
1.5
ns
DAT[3:0] Input (referenced to clock rising and falling edge)
T
IS2x
Input setup time
C
CARD
10 pF (1 card)
DDR50
3
ns
T
IH2x
Input hold time
C
CARD
10 pF (1 card)
DDR50
0.8
ns
DAT[3:0] Output (referenced to clock rising and falling edge)
T
ODLY2x
(max) Output delay time during
data transfer mode
C
L
25 pF (1 card)
DDR50
7
ns
T
ODLY2x
(min)
Output hold time
C
L
≥ 15 pF (1 card)
DDR50
1.5
ns
