PAN1326C Bluetooth Module
2 Overview
Product Specification Rev. 1.0
Page 17
2.6.2.4 Clock-Edge Operation
The codec interface of the CC2564C can work on the rising or the falling edge of the clock. It
also has the ability to sample the frame sync and the data at inversed polarity.
This is the operation of a falling-edge-clock type of codec. The codec is the master of the PCM
bus. The frame sync signal is updated (by the codec) on the falling clock edge and therefore
shall be sampled (by the CC2564C) on the next rising clock. The data from the codec is
sampled (by the CC2564C) on the clock falling edge.
2.6.2.5 Two-Channel PCM Bus Example
In below figure, a 2-channel PCM bus is shown where the two channels have different word
sizes and arbitrary positions in the bus frame. (FT stands for Frame Timer)
2.6.2.6 Audio Encoding
The CC2564C codec interface can use one of four audio-coding patterns:
•
A-Law (8-bit)
•
µ-Law (8-bit)
•
Linear (8- or 16-bit)