S
D
D
0
0
0
2
6
A
E
M
MN
6
6
2
7
8
5
T
B
U
C
T
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w
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c
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.
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1
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2
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.
When the IC is in serial data output mode 1 or 2, the SRDATA signal, LRCK signal, and BCLK
signal will be input into pins 57, 58, and 59 respectively so that IOSTOP bit will be set to 0.
Therefore, handle pins 57, 58, and 59 as input pins in serial data output mode 1 or 2.
The input timing of serial data is the same as the output timing of serial data.
S
R
D
A
T
A
L
R
C
K
B
C
L
K
I
n
v
a
l
i
d
14131
2111
0 9 8 7 6 5 4 3 2 1 0
1
5
141
31
21
11
0 9 8 7 6 5 4 3 2 1 0
1
5
1
5
L
-
c
h
R-ch
L-ch
Invalid
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.
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7-2 (3) Serial data input
6
4
Maintenance/
Discontinued
Maintenance/Discontinued includes following four Product lifecycle stage.
(planed maintenance type, maintenance type, planed discontinued typed, discontinued type)
