Panasonic KX-TD7685 - Wireless Digital Phone, Service Manual

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67
KX-TD7685
40 VDDE/INT5n/P1[5] O - COL0 For Key detect
41 SCL2/P3[0] O - Not in use (pull up) -
42 SDA2 O - Not in use (pull up) -
43 VSS - - Ground -
44 VDD - - 1.8V supply for core -
45 P2[0]/PWM0/SPIDI O - PWM0 Key click sound
46 P2[1]/PWM1/SPICLK O - Chip select 1: LCD chip select
47 P2[2]/ADC0/CLK100 O - Reset signal 0: LCD & IC301 reset
48 P2[3]/ADC1 O - Chip select 0: IC301 chip select
49 P2[4]/SCL1 O - SCL1 Sync clock(1.152MHz) for LCD & IC301
50 P2[5]/SDA1 O - SDA1 Serial data for LCD & IC301
51 P2[7]/DC_CTRL/
SPIDO O Pull-down (Built-in) Not in use (open) -
52 DC_I I - Not in use (GND) -
53 P1[6]/INT6n/PON I Pull-down (Built-in) PON 1: Power on
54 P1[7]/INT7n/CHARGE I Pull-down (Built-in) CHARGE 1: Charge detect
55 P2[6]/charge stop O - charge_stop 1: Charge OFF
56 VBAT3/RINGING I - VBAT3 -
57 DC_stab O - Not in use (open) -
58 DC_Sense I - Not in use (GND) -
59 AVS_sense I - AVS_sense Charge current measurement
60 ADC3 I - ADC3 Charge current measurement
61 LDO1_sense I - LDO1_sense 2.7V control signal
62 LDO1_CTRL O - LDO1_CTRL 2.7V control signal
63 LDO2_CTRL O - LDO2_CTRL 1.8V control signal
64 VBAT2 I - VBAT2 -
65 VBAT1 I - Not in use (GND) -
66 AVS2 - - Ground -
67 AVD2 - - 1.8V supply for core -
68 LSR+/REF O - LSR+ Audio signal to Receiver & Headset
69 LSR-/REF O - LSR- Audio signal to Receiver
70 LSR_HS/CIDIN- O - LSR_HS Audio signal to Speaker
71 VREF_HS/CIDOUT O - Not in use (open) -
72 MIC- I - Not in use (open) -
73 VREF- O - Ground -
74 VBUF O - VBUF -
75 AGND O - Ground -
76 MIC+ I - MIC+ Microphone signal input
77 VREF+/CIDIN+ O - VREF+ Microphone reference(1.5V output)
78 RSTN I Pull-up (Built-in) RSTN 0: reset
79 VDDIO - - 2.7V supply for I/O -
80 VSS - - Ground -
Pin
No.
Terminal Name I/O Setting Pull-up/down Pro-
cessing
Contents of Control Remark