Panasonic KX-FC265GR-T, Service Manual

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KX-FC265GR-T
6.6.2. Modem Circuit Operation
The modem (IC3) has all the hardware satisfying the CCITT standards mentioned previously.
When the ASIC IC10 (61) is brought to a low level, the modem (IC3) is chip-selected and the resistors inside IC are selected by the
select signals from ASIC (IC10) ADR0-ADR4. The commands are written through the data bus, and all the processing is controlled
by the ASIC (IC10) according to CCITT procedures. The INT signal dispatched from IRQ (pins 100 of IC3) to ASIC (IC10) when the
transmission data is accepted and the received data is demodulated, the ASIC (IC10) implements post processing. This modem
(IC3) has an automatic application equalizer.
With training signal 1 or 2 during G3 reception, it can automatically establish the optimum equalizer. The modem (IC3) operates
using the 32.256 MHz clock (X1).
1. Facsimile Transmission
The digital image data on the data bus is modulated in the modem (IC3), and sent from pin 56 via, amplifier IC102 and the NCU
section to the telephone line.
Refer to
Check Sheet for Signal Route (P.127).
2. Facsimile Reception
The analog image data which is received from the telephone line passes through the NCU section and enters pin 47 of the
modem (IC3). The signals that enter pin 47 of the modem (IC3) are demodulated in the board to digital image signals, then
placed on the data bus.
In this case, the image signals from the telephone line are transmitted serially. Hence, they are placed on the bus in 8 bit units.
Here, the internal equalizer circuit reduces the image signals to a long-distance receiving level.
This is designed to correct the characteristics of the frequency band centered around 3 kHz and maintain a constant receiving
sensitivity.
It can be set in the service mode.
Refer to
Check Sheet for Signal Route (P.127).