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PAN1322
Application Note
16
Revision 1.2, 2013-12-18
Design Guide
2.3
GPIO Interface
Most digital pins on eUniStone can be used as general purpose I/O’s (GPIOs). The GPIO pins are
grouped into two ports: P0 and P1. P0 has 16 pins (P0.0 - P0.15) and P1 has nine pins (P1.0 - P1.8).
The non-reserved pins on port P0 may be controlled with AT commands. The P1 pins are not
controllable through AT commands. They are reserved for use by future applications of the chip.
2.4
JTAG Interface
The pins used for the JTAG interface (TDI, TDO, TMS, TCK and RTCK) can also be used as general
purpose I/Os. The operative interface (JTAG or GPIO) on these pins can be selected through the mode
selection pin JTAG#. When JTAG# is connected to low, the pins are used for JTAG interface. When
JTAG# is connected to high, the pins serve as GPIO pins.
JTAG# has an internal pull-up. If the JTAG functionality is not needed, leave this pin open.