217
DX-600/800
APR 2002
Edition 1.0
6.2.4
CCD Drive Clock Generator Circuit
This circuit is also contained in IC30. Its function is to generate FSG, FCK1, FCK2 and RS clock signals,
which are required for driving the CCD. These clock signals are generated by the system clock generator
circuit derived from the 4 MHz clock signal that is input to IC30. Its timing chart is shown below.The FR
clock supplied to the CCD is output from the RS of IC3. The RS clock of IC3 is derived from the FR clock of
IC30 [MN86075] generates the timing of the RS clock to drive the CCD.
FCK1
FCK2
RS
FSG
CCD
FR
RS
FCK1
FCK2
FSG
IC3
SHINE
IC30
86075
FR
Summary of Contents for DX-600
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