Panasonic AG520VDH - COMB. DVD/VCR/TV, Service Manual

Page: 51 / 100

AG-520VDH
I/O CHART OF IC8002, IC8003, IC8004
IC8005 IC-DETAIL BLOCK DIAGRAM
I/O CHART OF IC8004 I/O CHART OF IC8002 I/O CHART OF IC8003
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
Memory address 20 I NC
Memory address 21 I NC
+3.3V I VCCW
(Not used) - WP
DVD Ready (Busy : low) I RDY/BSY
I/O
I
Signal Name Description
A11 Memory address 12
Memory address 10
Memory address 9
Memory address 14
Memory address 15
Memory address 19
Memory address 16
Memory address 16
Memory address 13
Memory address 8
Memory address 7
Memory address 6
Memory address 5
Memory address 4
Memory address 3
Memory address 2
Memory address 1
Memory address 11
Memory data 0
Memory data 1
Memory data 2
Memory data 3
Memory data 4
Memory data 5
Memory data 6
Memory data 7
Memory address 18
I A9
I A8
I A13
I A14
I A17
I /WE Write enable : low
I /RST Reset : low
I VCC +3.3V
I A18
I A16
I A15
I A12
I A7
I A6
I A5
I A4
I A3
I A2
I A1
I A0
I/O DQ0
I/O DQ1
I/O DQ2
- VSS Ground
- VSS
I /BYTE +3.3V
Ground
I/O DQ3
I/O DQ4
I/O DQ5
I/O DQ6
I/O DQ7
Memory data 8
Memory data 9
Memory data 10
Memory data 11
Memory data 12
Memory data 13
Memory data 14
Memory data 15
I/O DQ8
I/O DQ9
I/O DQ10
I/O DQ11
I/O DQ12
I/O DQ13
I/O DQ14
I/O DQ15A-1
I /CE
A10
Memory chip select : low
I
I /OE Output enable : low
Pin No. I/O
1
Signal Name Description
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
VDD
DQ0
VDDQ
DQ1
DQ2
VSSQ
DQ3
DQ4
VDDQ
DQ6
VSSQ
DQ7
VDD
LDQM
/WE
/CAS
/RAS
SDRAM data 5
/CS
I/O
I SDRAM chip select : low
DQ5
+3.3V I
SDRAM data 0 I/O
+3.3V I
SDRAM data 1 I/O
SDRAM data 2 I/O
Ground -
SDRAM data 3 I/O
SDRAM data 4 I/O
+3.3V I
I/O SDRAM data 6
- Ground
I/O SDRAM data 7
I +3.3V
I Data input/output mask
I Write enable : low
I Column address strobe : low
I Row address strobe :low
A11
BA0
BA1
A10/AP
A0
A1
A2
UDQM
VDD
(Not used) - NC
SDRAM address 11 I
Bank address 0 I
Bank address 1 I
SDRAM address 10 I
SDRAM address 0 I
SDRAM address 1 I
SDRAM address 2 I
Data input/output mask I
+3.3V I
VSS
A3
A4
A5
A6 I
- Ground
I SDRAM address 3
I SDRAM address 4
I SDRAM address 5
A7
A8
A9
CKE
CLK
NC
VSS
DQ8
VDDQ
DQ9
DQ10
VSSQ
DQ11
DQ12
VDDQ
DQ13
DQ14 I/O SDRAM data 14
SDRAM address 7
SDRAM address 6
I
SDRAM address 8 I
SDRAM address 9 I
(Not used) -
SDRAM clock I
(Not used) -
Ground -
I/O SDRAM data 8
I +3.3V
I/O SDRAM data 9
I/O SDRAM data 10
- Ground
I/O SDRAM data 11
I/O SDRAM data 12
I +3.3V
I/O SDRAM data 13
VSSQ
DQ15
VSS - Ground
- Ground
I/O SDRAM data 15
Pin No.
1
2
3
4
5
6
7
8
I/O
I/O
Signal Name Description
SDA Serial data
Write protect
Serial clock
- WP
I VCC
- A2
- A1
- A0
- VSS
SCL I
(Not used)
(Not used)
(Not used)
+3.3V
Ground
4
3
7
8
VIN
VC
VB
OCP
OCP(2)
AMP1
DRIVE
REF
ON/OFF
OPEN:OFF
LOW:OFF
HIGH:ON
TSD
ADJ
GND
5
6
2
+
-
+
-
+
-
VOUT
1
IC8005
IC-DETAIL BLOCK DIAGRAM
AG-520VDH
51