1-8
LONG PAUSE
REC MODE
LP WARNING
TEST SIGNAL
TEMP THRESHOLD
BATT. SHUT DOWN
BATT. ALARM
OFF
ON
SP
LP
OFF
ON
OFF
ON
220
10.5
11.0
Disables long pause function
Enables long pause function
SP recording
LP recording (Do not change since performance cannot be guaranteed)
LP INH not displayed (Enables playback with LP mode) (Do not change since
performance cannot be guaranteed)
LP INH displayed (Disables playback with LP mode)
Output color bars only. Do not output any other TEST signals.
Use BARS button of a attached wireless controller reception to trigger output TEST
signal, rotating in this order:
Color bars
Color bars (rotate per track)
Grayscale
Grayscale (rotate per
track)
Multi burst (Y signal only)
Multi burst (Y and C signals)
100% white
Red
Black burst
Threshold of rising temperature warning display, 00~255 (220 [DCh] = internal
temperature approx. 60°C). Refer to item “TEMP” in table 1.8.7 (1)
Voltage value to carry out power OFF operation (Set at OFF, 10.0~12.0 in
increments of 0.1)
Voltage value to trigger display of battery alarm warning (Set at 10.0~12.0 in
increments of 0.1)
Item
Parameter
1.8.3
VTR 1 menu
Table 1.8.3 VTR 1 Menu Setting Item List
is default setting when shipped from factory.
1.8.4
VTR 2 menu
Table 1.8.4 VTR 2 Menu Setting Item List
REC REPEAT
FOOT SW LEVEL
MIC REC CH
ID 422 (H)
ID 422 (L)
FF/REW SPEED
DV DF MASK (PAL only)
OFF
2
12
ON
LEVEL1
LEVEL2
NORMAL
CH1-MIX
CH2-MIX
F0
4E
x50
x75
x100
MAX
OFF
ON
No repeat recording
Repeat recording 2 times
Repeat recording 12 times
Full repeat recording
Possible from any mode
Possible only from STOP or REC PAUSE mode
Record input signal from connected MIC only on CH2 (CH4 : during A.DUB mode)
[No recording mode]. Do not record input signal from connected MIC on CH1/CH2
(No recording on CH3+4 during A.DUB)
Record input signal from connected MIC on CH1/CH2 (CH3/CH4 during A.DUB)
High Device ID (00~FF). First bit is fixed at PAL1, NTSC0
Low Device ID (00~FF)
Maximum FF/REW speed is regulated to x50
Maximum FF/REW speed is regulated to x75
Maximum FF/REW speed is regulated to x100
No maximum FF/REW speed regulation
“1” is recorded as per format
“0” is always recorded
Item
Parameter
is default setting when shipped fr om factory.
Summary of Contents for AG-DV2500P
Page 2: ...2 ...
Page 7: ...7 ...
Page 8: ...1 Service Information 2 Mechanical Adjustments 3 Electrical Adjustments 8 ...
Page 39: ...MAIN SCHEMATIC DIAGRAM 4 6 5 10 ...
Page 41: ...MAIN SCHEMATIC DIAGRAM 6 6 5 12 Page 5 16 Page 5 16 5 18 ...
Page 42: ...5 12 MDA DC SCHEMATIC DIAGRAM 1 4 5 21 TO CN112 Page 5 27 MECHA CONN ...
Page 43: ...5 22 MDA DC SCHEMATIC DIAGRAM 2 4 CN105 Page 5 18 CN116 Page 5 27 ...
Page 45: ...5 24 MDA DC SCHEMATIC DIAGRAM 4 4 CN108 Page 5 18 ...
Page 77: ...5 5 OVERALL WIRING DIAGRAM 5 5 CN111 MDA DC CN101 DV CPU ...
Page 169: ...5 3 VIDEO BLOCK DIAGRAM 5 3 ...
Page 170: ...5 4 AUDIO BLOCK DIAGRAM 5 4 ...
Page 171: ...5 5 OVERALL WIRING DIAGRAM 5 5 CN111 MDA DC CN101 DV CPU ...
Page 172: ...5 6 DV UNIT OVERALL WIRING DIAGRAM 5 6 ...
Page 176: ...MAIN SCHEMATIC DIAGRAM 4 6 5 10 ...
Page 178: ...MAIN SCHEMATIC DIAGRAM 6 6 5 12 Page 5 16 Page 5 16 5 18 ...
Page 181: ...5 9 DV CPU SCHEMATIC DIAGRAM 1 4 5 15 MIX AGC BIAS REC GAIN ...
Page 183: ...DV CPU SCHEMATIC DIAGRAM 3 4 5 17 ...
Page 187: ...5 12 MDA DC SCHEMATIC DIAGRAM 1 4 5 21 TO CN112 Page 5 27 MECHA CONN ...
Page 188: ...5 22 MDA DC SCHEMATIC DIAGRAM 2 4 CN105 Page 5 18 CN116 Page 5 27 ...
Page 190: ...5 24 MDA DC SCHEMATIC DIAGRAM 4 4 CN108 Page 5 18 ...
Page 191: ...5 13 FDM FRONT DV CONN MIC SCHEMATIC DIAGRAMS 5 25 Page 5 12 Page 5 16 Page 5 9 ...
Page 194: ...5 28 5 16 MECHA MECHA CONN CIRCUIT BOARDS SIDE A MECHA CIRCUIT BOARD ...
Page 195: ...5 29 SIDE B SIDE A MECHA CONN CIRCUIT BOARD ...
Page 196: ...5 30 5 17 IC BLOCK DIAGRAMS ...
Page 197: ...5 31 ...
Page 198: ...5 32 ...
Page 199: ...5 33 ...
Page 200: ...5 34 ...
Page 201: ...5 35 ...
Page 202: ...5 36 ...
Page 203: ...5 37 ...
Page 204: ...5 38 ...
Page 205: ...5 39 ...
Page 224: ...5 4 AUDIO BLOCK DIAGRAM 5 4 ...
Page 226: ...5 3 VIDEO BLOCK DIAGRAM 5 3 ...
Page 232: ...5 28 5 16 MECHA MECHA CONN CIRCUIT BOARDS SIDE A MECHA CIRCUIT BOARD ...
Page 233: ...5 29 SIDE B SIDE A MECHA CONN CIRCUIT BOARD ...
Page 236: ... 3 AG DV2500E ...
Page 238: ... 5 AG DV2500P ...
Page 239: ... 6 AG DV2500E ...
Page 240: ... 7 ...
Page 241: ...FCD0303BYNK130 ...
Page 256: ...5 9 DV CPU SCHEMATIC DIAGRAM 1 4 5 15 MIX AGC BIAS REC GAIN ...
Page 258: ...DV CPU SCHEMATIC DIAGRAM 3 4 5 17 ...
Page 260: ...5 6 DV UNIT OVERALL WIRING DIAGRAM 5 6 ...
Page 295: ...5 13 FDM FRONT DV CONN MIC SCHEMATIC DIAGRAMS 5 25 Page 5 12 Page 5 16 Page 5 9 ...
Page 296: ...5 30 5 17 IC BLOCK DIAGRAMS ...
Page 297: ...5 31 ...
Page 298: ...5 32 ...
Page 299: ...5 33 ...
Page 300: ...5 34 ...
Page 301: ...5 35 ...
Page 302: ...5 36 ...
Page 303: ...5 37 ...
Page 304: ...5 38 ...
Page 305: ...5 39 ...