U8067: LP2996MX (DDR-SDRAM Termination Regulator)
IC BLOCK DIAGRAMS AND TERMINAL DESCRIPTIONS -71
TX-SR876/SA876
TERMINAL DESCRIPTION
PIN CONFIGURATION
BLOCK DIAGRAM
AVIN AND PVIN
AVIN and PVIN are the input supply pins for the LP2996.
AVIN is used to supply all the internal control circuitry.
VDDQ
PIN
DESCRIPTION
VDDQ is the input used to create the internal reference
voltage for regulating V
TT
. The reference voltage is generated
from a resistor divider of two internal 50 kohm resistor.
V
SENSE
The purpose of the sense pin is to provide improved remote
load regulation.
SHUTDOWN
The LP2996 contains an active low shutdown pin that can be
used to tri-state V
TT
.
V
REF
V
REF
provides the buffered output of the internal reference
voltage VDDQ / 2.
V
TT
V
TT
is the regulated output that is used to terminate the bus
resistors. It is capable of sinking and sourcing current while
regulating the output precisely to VDDQ / 2.