ON Semiconductor NCP1351B, Application Note

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AND8344/D
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3
This is used to enter a skip cycle during no-load conditions
or to stop pulses to protect the primary MOSFETs if there is
a short on the output(s) or if the rectifier on the secondary
side is damaged.
100 ms PFC Delay
This timer ensures the main LLC SMPS will not start until
the power factor correction (PFC) stage is fully stabilized.
This is beneficial mainly in cases where the SMPS is
connected to mains with 110 V ac
.
Without the delay,
the PFC front end may not be able to supply the needed
current if the LLC starts under full load and there is a short
soft-start.
Fixed Dead Time (DT)
The NCP1392 series features fixed dead time between
outputs and is available in 300 ns, 600 ns and 1,100 ns
versions.
This provides the designer flexibility in choosing
the version with the appropriate dead time to protect
switches against cross-conduction. The length of the DT is
chosen based on the total capacitance of MOSFETs used in
the application. If the DT is short, there is not enough time
to re-charge this capacitance and the opposite MOSFET is
turned on before the source to drain voltage reaches 0 V.
The result is poor efficiency and EMI. On the other hand, it
is not good to choose a DT that is too long. During the dead
time period, current is supplied by the resonant tank, but
there is only a finite amount stored for use during the dead
time period. Too long of a dead time will deplete all of the
stored energy needed to supply the current. If this occurs,
the current will reverse direction before the dead time ends.
The result is “hard switching” which is very dangerous and
the MOSFET can be damaged. Furthermore, the higher DT
means lower frequency range. Based on these facts, for this
application version B has been chosen with a dead time of
600 ns.
Built-In Oscillator (RT Pin)
The NCP1392 includes a built-in oscillator driven by
current flowing from the RT pin. F
min
is set with
±
3%
accuracy, and F
max
has an accuracy of
±
15%. Because the
oscillator is current-driven, additional regulation loops can
easily be connected to the RT pin in parallel. The RT pin has
a 3.5 V reference voltage. Therefore, a shunt regulator
(e.g. TLV431) can be directly connected to the RT pin to
create another regulation loop.
High Side Driver
The NCP1392 enables direct connection of the high side
MOSFET due to the built-in high side driver (HSD). This
“floating” driver accepts voltages up to 600 V and has robust
dV/dt immunity. The HSD is powered from V
cc
through
a bootstrap diode and features under-voltage detection,
which ensures the high side MOSFET will be turned on only
if there is enough voltage to properly turn on the MOSFET.
With this driver, it is not necessary to use a special
transformer or optocoupler for driving the upper MOSFET.
For more information and a detailed description of the
NCP1392B, please refer to the data sheet.
Detailed Demoboard Description
The schematic of the demoboard is shown in Figure 47. As
mentioned above, the SMPS is composed of three blocks.
The PFC front stage accepts input voltages from
85 Vac/60 Hz to 265 Vac/50 Hz and converts it to 385 V dc
nominal. The main LLC SMPS converts the bulk voltage
from 385 V to two dc voltages, 12 V/3 A and 24 V/6 A.
A regulation loop is taken only from the 24 V output
because regulation of this output is the most critical. To
ensure that both output voltages are regulated, it is necessary
to add another resistor divider and the whole loop will
regulate at a percentage weight with respect to both output
voltages. The third block is the standby SMPS which powers
the control unit of the TV when the main SMPS is off by
supplying a 5 V/2 A output. There is an additional 5 V/2 A
output available when the LLC is active.
NOTE: Because the regulation loop is taken only from 24 V line,
it is not possible to load the 12 V line when there is no load
on the 24 V line.
PFC Front Stage
Figure 2. The EMI Filter