NCP1239
http://onsemi.com
15
Figure 34. Standby Detection
Jittering 10ms*
Vpin6
(SS/timer)
Fb is ok
Drv
FB
PFC running
Standby is entered Standby is left
PFC is down
Skip activity
Standby is not confirmed
Standby is confirmed,
No delay
Stby_detect latch is armed
Stby_detect latch is reset
100ms*
100ms*
delay
FB−skip (Vpin7)
FB−stby−out (1.7*Vpin7)
4.3V
3.0V
1.8V
Bunches of pulses
Standby Detection
*This time is programmed by the Pin 6 capacitor. C
pin6
= 390 nF nearly sets the following intervals:
− Soft−Start Time (T
ss
):7.5 ms
− Jittering Period (T
jittering
): 10 ms
− Fault Detection Delay (T
delay
): 100 ms
More generally, the times approximately depend on C
pin6
as follows:
− T
ss
= 7.5 ms * C
pin6
/ 390 nF
− T
jittering
=10 ms * C
pin6
/ 390 nF
− T
delay
=100 ms * C
pin6
/ 390 nF
