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©

 Semiconductor Components Industries, LLC, 2014

December, 2018 

 Rev. 15

1

Publication Order Number:

MC14541B/D

MC14541B

Programmable Timer

The MC14541B programmable timer consists of a 16

stage binary

counter, an integrated oscillator for use with an external capacitor and
two resistors, an automatic power

on reset circuit, and output control

logic.

Timing is initialized by turning on power, whereupon the power

on

reset is enabled and initializes the counter, within the specified V

DD

range. With the power already on, an external reset pulse can be
applied. Upon release of the initial reset command, the oscillator will
oscillate with a frequency determined by the external RC network. The
16

stage counter divides the oscillator frequency (f

osc

) with the n

th

stage frequency being f

osc

/2

n

.

Features

Available Outputs 2

8

, 2

10

, 2

13

 or 2

16

Increments on Positive Edge Clock Transitions

Built

in Low Power RC Oscillator (

±

2% accuracy over temperature

range and 

±

20% supply and 

±

3% over processing at < 10 kHz)

Oscillator May Be Bypassed if External Clock Is Available

(Apply external clock to Pin 3)

External Master Reset Totally Independent of Automatic Reset

Operation

Operates as 2

n

 Frequency Divider or Single Transition Timer

Q/Q Select Provides Output Logic Level Flexibility

Reset (auto or master) Disables Oscillator During Resetting to

Provide No Active Power Dissipation

Clock Conditioning Circuit Permits Operation with Very Slow Clock

Rise and Fall Times

Automatic Reset Initializes All Counters On Power Up

Supply Voltage Range = 3.0 Vdc to 18 Vdc with Auto Reset

Supply Voltage Range = 

Disabled (Pin 5 = V

DD

)

Supply Voltage Range 

= 8.5 Vdc to 18 Vdc with Auto Reset

Supply Voltage Range = 

Enabled (Pin 5 = V

SS

)

NLV Prefix for Automotive and Other Applications Requiring

Unique Site and Control Change Requirements; AEC

Q100

Qualified and PPAP Capable

These Devices are Pb

Free and are RoHS Compliant

www.onsemi.com

MARKING DIAGRAMS

A

= Assembly Location

WL, L

= Wafer Lot

YY, Y

= Year

WW, W = Work Week
G or 

G

= Pb

Free Package

See detailed ordering and shipping information in the package
dimensions section on page 2 of this data sheet.

ORDERING INFORMATION

SOIC

14

D SUFFIX

CASE 751A

TSSOP

14

DT SUFFIX

CASE 948G

1

14

14541BG

AWLYWW

14

541B

ALYW

G

G

1

14

SOEIAJ

14

F SUFFIX

CASE 965

1

14

MC14541B

ALYWG

(Note: Microdot may be in either location)

PIN ASSIGNMENT

NC = NO CONNECTION

11

12

13

14

8

9

10

5

4

3

2

1

7

6

MODE

NC

A

B

V

DD

Q

Q/Q SEL

NC

R

S

C

tc

R

tc

V

SS

MR

AR

SOIC

14

TSSOP

14

SOEIAJ

14

Summary of Contents for MC14541B

Page 1: ...of any support or applications information provided by onsemi Typical parameters which may be provided in onsemi data sheets and or specifications can and do vary in different applications and actual performance may vary over time All operating parameters including Typicals must be validated for each customer application by customer s technical experts onsemi does not convey any license under any ...

Page 2: ...omatic Reset Operation Operates as 2n Frequency Divider or Single Transition Timer Q Q Select Provides Output Logic Level Flexibility Reset auto or master Disables Oscillator During Resetting to Provide No Active Power Dissipation Clock Conditioning Circuit Permits Operation with Very Slow Clock Rise and Fall Times Automatic Reset Initializes All Counters On Power Up Supply Voltage Range 3 0 Vdc t...

Page 3: ...functionality should not be assumed damage may occur and reliability may be affected 1 Temperature Derating D DW Packages 7 0 mW _C From 65_C To 125_C ORDERING INFORMATION Device Package Shipping MC14541BDG SOIC 14 Pb Free 55 Units Rail NLV14541BDG SOIC 14 Pb Free 55 Units Rail MC14541BDR2G SOIC 14 Pb Free 2500 Tape Reel NLV14541BDR2G SOIC 14 Pb Free 2500 Tape Reel MC14541BDTR2G TSSOP 14 Pb Free 2...

Page 4: ...urrent Iin 15 0 1 0 00001 0 1 1 0 mAdc Input Capacitance Vin 0 Cin 5 0 7 5 pF Quiescent Current Pin 5 is High Auto Reset Disabled IDD 5 0 10 15 5 0 10 20 0 005 0 010 0 015 5 0 10 20 150 300 600 mAdc Auto Reset Quiescent Current Pin 5 is low IDDR 10 15 250 500 30 82 250 500 1500 2000 mAdc Supply Current Notes 3 4 Dynamic plus Quiescent ID 5 0 10 15 ID 0 4 mA kHz f IDD ID 0 8 mA kHz f IDD ID 1 2 mA ...

Page 5: ... 5 2 5 18 10 7 5 ms Clock Pulse Width tWH cl 5 0 10 15 900 300 225 300 100 85 ns Clock Pulse Frequency 50 Duty Cycle fcl 5 0 10 15 1 5 4 0 6 0 0 75 2 0 3 0 MHz MR Pulse Width tWH R 5 0 10 15 900 300 225 300 100 85 ns Master Reset Removal Time trem 5 0 10 15 420 200 200 210 100 100 ns 5 The formulas given are for the typical characteristics only at 25_C 6 Data labelled Typ is not to be used for des...

Page 6: ...REQUENCY SELECTION TABLE A B Number of Counter Stages n Count 2n 0 0 13 8192 0 1 10 1024 1 0 8 256 1 1 16 65536 TRUTH TABLE Pin State 0 1 Auto Reset 5 Auto Reset Operating Auto Reset Disabled Master Reset 6 Timer Operational Master Reset On Q Q 9 Output Initially Low After Reset Output Initially High After Reset Mode 10 Single Cycle Mode Recycle Mode Figure 3 Oscillator Circuit Using RC Configurat...

Page 7: ... of B However when B is 0 normal counting is interrupted and the 9th counter stage receives its clock directly from the oscillator i e effectively outputting 28 The Q Q select output control pin provides for a choice of output level When the counter is in a reset condition and Q Q select pin is set to a 0 the Q output is a 0 correspondingly when Q Q select pin is set to a 1 the Q output is a 1 Whe...

Page 8: ...NSION b DOES NOT INCLUDE DAMBAR PROTRUSION ALLOWABLE PROTRUSION SHALL BE 0 13 TOTAL IN EXCESS OF AT MAXIMUM MATERIAL CONDITION 4 DIMENSIONS D AND E DO NOT INCLUDE MOLD PROTRUSIONS 5 MAXIMUM MOLD PROTRUSION 0 15 PER SIDE H 14 8 7 1 M 0 25 B M C h X 45 SEATING PLANE A1 A M _ S A M 0 25 B S C b 13X B A E D e DETAIL A L A3 DETAIL A DIM MIN MAX MIN MAX INCHES MILLIMETERS D 8 55 8 75 0 337 0 344 E 3 80 ...

Page 9: ...LUDE INTERLEAD FLASH OR PROTRUSION INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0 25 0 010 PER SIDE 5 DIMENSION K DOES NOT INCLUDE DAMBAR PROTRUSION ALLOWABLE DAMBAR PROTRUSION SHALL BE 0 08 0 003 TOTAL IN EXCESS OF THE K DIMENSION AT MAXIMUM MATERIAL CONDITION 6 TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY 7 DIMENSION A AND B ARE TO BE DETERMINED AT DATUM PLANE W _ _ _ _ S U 0 15 0 006 T 2X L ...

Page 10: ...ucts and applications using ON Semiconductor products including compliance with all laws regulations and safety requirements or standards regardless of any support or applications information provided by ON Semiconductor Typical parameters which may be provided in ON Semiconductor data sheets and or specifications can and do vary in different applications and actual performance may vary over time ...

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