Appendix C
"
Instruction Tables
The following tables list all of the ladder diagram programming instructions for the Ladder Program I/O Unit. These
are all the same as corresponding instructions for the C500, except that data areas differ and not all C500 instruc-
tions are supported (see table at the end of this appendix). Refer to the
C500 Operation Manual
for details.
Basic Instructions
Name and
Mnemonic
Symbol
Function
Operand Data Areas
LOAD
LD
B
Defines the status of bit B as the execution
condition for subsequent operations in the
instruction line.
B:
IR
SR
Work bits
TC
TR
LOAD NOT
LD NOT
B
Defines the status of the inverse of bit B as the
execution condition for subsequent operations
in the instruction line.
B:
IR
SR
Work bits
TC
AND
AND
B
Logically ANDs the status of the designated bit
with the current execution condition.
B:
IR
SR
Work bits
TC
AND NOT
AND NOT
B
Logically ANDs the inverse of the designated bit
with the current execution condition.
B:
IR
SR
Work bits
TC
OR
OR
B
Logically ORs the status of the designated bit
with the current execution condition.
B:
IR
SR
Work bits
TC
OR NOT
OR NOT
B
Logically ORs the inverse of the designated bit
with the execution condition.
B:
IR
SR
Work bits
TC
AND LOAD
AND LD
Logically
ANDs
the
resultant
execution
conditions of the preceding logic blocks.
None
Summary of Contents for C500-LDP01-V1
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