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2.7 A/D Conversion
This section explains how to perform A/D conversions. The A/D conversion
can be triggered 3 ways,
by software trigger, by pacer trigger or by
external trigger
to the A/D converter. At the end of A/D conversion, it is
possible to transfer data by 3 ways, those are
polling , interrupt and DMA.
Before using the A/D conversion functions, the user should be aware of the
following issues:
z
A/D data register BASE+4/BASE+5 stores the A/D conversion data
(sec. 2.4.2)
z
A/D gain control register BASE+9 selects the gain
(sec. 2.4.6)
z
A/D multiplexer control register BASE+A selects the analog input
channel
(sec. 2.4.7)
z
A/D mode control register BASE+B selects the trigger type and transfer
type
(sec. 2.4.8)
z
A/D software trigger control register is BASE+C
(sec. 2.4.9)
z
JP3 selects single-ended or differential input
(sec. 2.3.3)
z
JP4 selects internal/external trigger
(sec. 2.3.4)
z
JP5 selects the IRQ level
(sec. 2.3.5)
z
JP6 selects the internal/external clock for counter0
(sec. 2.3.6)
z
JP7 and JP8 selects the DMA channel
(sec. 2.3.7)
z
There are 3 trigger types : software, pacer, external trigger (sec.
2.4.8)
z
There are 3 transfer types : polling, interrupt, DMA (sec. 2.4.8)
The block diagram is given below:
JP3
Base+C
OME-A-822PGL/PGH
Base+B
JP4
JP5
JP7
JP8
Base+A
Base+9
Trigger
Logic
CPU
Transfer
Logic
Memory
Buffer
12 bits
A/D
Gain
control
16/8 to 1
Multi-
plexer
CN3
OME-A-822PGL/PGH Hardware Manual ----
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