Oki OKIPAGE 14i, Service Manual

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Service Manual for OKIPAGE 14i
Chapter 2 Operation
Page: 12
2.1 Main Control Board
The main control board consists of a single chip CPU, two program/font ROMs, four DRAMs, an EEPROM, a host interface circuit, and a mechanism driving
circuit.
(1) Single chip CPU
The single chip CPU is a custom CPU (32-bit internal bus, 32-bit external bus, 32-bit external bus, 49.766-MHz clock, which incorporates the RISC CPU and its
peripheral devices, and has the following functions:
(2) Program and Font ROMs
Built-in Device Function
Chip select controller
Bus controller
DRAM controller Control of ROM, DRAM and I/O device.
DMA controller Transfer of image data from DRAM to video output
port.
Parallel interface controller Control of Centronics parallel interface.
Serial interface controller Control of RS-232C serial interface.
Video output port
LED STB output port Controls LED head.
Timer Generation of various control timing
Monitoring of paper running and paper size.
Serial I/O port Control of operator panel, EEPROM, and options.
I/O Port Input and output of sensor and motor signals.
The Program and Font ROMs store the equipment program and various types of fonts. Mask ROM is used as Program and Font ROMs. The mounting locations
of these Program and Font ROMs vary depending on the type of the ROMs.
(3) DRAM
The DRAM is a 8MB resident memory on the main control board that stores edited data, image data, DLL data and macro data.
(4) EEPROM