Oki OKIFAX 5750, Service Manual

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/IRQ4 = Centronics I/F controller interrupt, JBIG chip interrupt, MUPIS I/F, power I/F, second tray I/F, user DMA channel 4/5 (Centronics), use DMA channel 6/7
(JBIG)
(6) DMA controller
Two channels of DMAs with external transfer request (DREQ) and acknowledge (DACK) pins and two channels of DMAs without DREQ/DACK pins are
incorporated.
DMA channel 0 (with DREQ/DACK): Used for transfer form read image processing LSI chip to memory.
DMA channel 1 (with DREQ/DACK): Used for transfer from memory to IOGA print image processor.
DMA channel 2 (without DREQ/DACK): Not used.
DMA channel 3 (without DREQ/DACK): Used to count main motor operating pulses.
(7) 16-bit timer pulse unit
Channels are used as follows:
ITU channel 0: Used as a 5-ms system timer.
ITU channel 1: A desired time-out time (0 - 13.1 ms) can be specified in steps of 0.2 µs.
ITU channel 2: A 204.8-µs (4.883 kHz) clock signal is input from the TCLKC pin. The clock signal is used in the external clock count mode to make measurement
in units of 204.8 µs. The measurement range is from about 0.2 ms to 13.422 sec.
ITU channel 3: Used for drum motor phase control.
ITU channel 4: Used for resist motor phase control.
(8) Serial communication interface
In this system, SCI channel 0 is used in the start-stop mode as the interface with the OPE.
Copyright 2000, Oki Data, Division of OKI America, Inc. All rights reserved. See the Oki Data Business Partner Exchange
(BPX) for any updates to this material. (http://bpx.okidata.com)