NXP Semiconductors UJA1169A User Manual Download Page 35

NXP Semiconductors

UM11758

UJA1169A evaluation boards

Example script using all available commands:

// This is an example script for UJA1169AXF-EVB

// For UJA1169AF-EVB/UJA1169AF3-EVB replace "UJA1169AXF" with applicable device name

        

// Do not run this script with the auto-repeat option,

//   because the script includes a PAUSE command

        

// write value 0x07 to Mode-control register

SET_REG:UJA1169AXF:Primary control:Mode control:0x07

        

// read Global event status register

GET_REG:UJA1169AXF:Event capture:Global event status

        

// turn on red LED

SET_DPIN:UJA1169AXF:RedLED:LOW

        

// give user time to identify the current LED color

PAUSE:RGB LED will change from red to green

        

// turn off red LED & turn on green LED

SET_DPIN:UJA1169AXF:RedLED:HIGH

SET_DPIN:UJA1169AXF:GreenLED:LOW

Example script that programs the SBC for Software Development mode:

// Script for programming UJA1169AXF SBC MTPNV registers to Software Development mode

// For UJA1169AF-EVB/UJA1169AF3-EVB replace "UJA1169AXF" with applicable device name

      

// Read MTPNV status register

GET_REG:UJA1169AXF:MTPNV and ID Registers:MTPNV status

      

// The user can now check if device is ready for programming

PAUSE:Only if MTPNV status value was an odd number, programming can be successful

      

// Set default reset length to maximum and no auto-start of VEXT

SET_REG:UJA1169AXF:MTPNV and ID Registers:Start-up control:0x00

      

// Set Software Development mode, allow Sleep mode and set max reset threshold as default

SET_REG:UJA1169AXF:MTPNV and ID Registers:SBC configuration control:0x04

      

// Enter the CRC code that fits to above selections

SET_REG:UJA1169AXF:MTPNV and ID Registers:MTPNV CRC control:0xFB

A tool is provided as an attachment to this document to calculate the CRC (see last two

lines in above script).
A system reset is generated after programming the MTPNV memory, after which the

connection between the FlexGUI and the board will need to be re-established (see

Section 6.4.2

). If the reconnection fails, try again after a power-off/wait-3-seconds/power-

on sequence on the UJA1169Ax-EVB.

6.4.7 Logging read and write operations

Each executed read or write access is logged in the upper left corner of the FlexGUI

window. The logged data can be saved to a log file at any time.
A number of 

Log Level

 filter options are available to tailor the logged data to the needs

of the user (see 

Figure 37

). When 'FINEST' is selected, all bits of signals SDI ('out')

and SDO ('in') are displayed for each SPI transfer (see script execution example in

Figure 38

).

UM11758

All information provided in this document is subject to legal disclaimers.

© NXP B.V. 2022. All rights reserved.

User manual

Rev. 1 — 19 April 2022

35 / 39

Summary of Contents for UJA1169A

Page 1: ...intended to represent a final design recommendation for any particular application Final device in an application heavily depends on proper printed circuit board layout and heat sinking design as wel...

Page 2: ...JA1169A evaluation board family consists of three variant boards as detailed in Table 1 The entire UJA1169A product family can be evaluated using these three boards and not just the onboard devices Fo...

Page 3: ...ed battery supply status LEDs for BAT V1 V2 VEXT and LIMP signals external PNP transistor for thermal management local wake up and CAN bus termination The boards also provide several header rows 2 54...

Page 4: ...jumper J8 to disconnect VIN on J5 from the battery supply Table 3 BAT VIN connections Both supply circuits are routed via polarity protection Schottky diode D1 in order to block reverse currents Deco...

Page 5: ...header J5 via jumper J7 e g for the MCU IO supply VEXCTRL pin 15 TP4 VEXCC pin 6 J9 01 connected to the collector of the onboard PNP transistor PNP UJA1169Ax EVB B pin 4 J9 03 connected to the base of...

Page 6: ...ND Pull up resistor R15 is used to pull up the PNP base voltage to prevent it floating e g if R10 has been removed and therefore ensure that the PNP is turned OFF Filter capacitor C9 is needed to prot...

Page 7: ...Ax EVB PCB configured to operate without a PNP Figure 6 UJA1169Ax EVB PCB configured to operate without a PNP 2 2 2 3 UJA1169Ax EVB with multiple external PNPs If thermal dissipation is so high that i...

Page 8: ...3 1 6 J7 R15 100 k R10 0 PNP C8 6 8 F C9 10 nF R15 100 k PNP R4 10 R4 10 C9 10 nF R15 100 k PNP R4 10 C9 10 nF Figure 7 Simplified schematic of UJA1169Ax EVB with multiple PNPs Figure 8 UJA1169Ax EVB...

Page 9: ...ver up to 100 mA A decoupling capacitor C10 is connected between the pin and ground on the board LED D6 lights up when the V2 VEXT output is active The V2 UJA1169AF EVB and UJA1169AF3 EVB or VEXT UJA1...

Page 10: ...onfigured to be used as termination nodes in a CAN network If the CAN network is already terminated at both ends it is recommended to remove R2 and R3 or replace them with higher value resistors to en...

Page 11: ...aluation boards feature local wake up test circuitry The WAKE pin is pulled HIGH by default via 10 k resistors R6 and R7 When switch SW1 is pressed the WAKE pin is pulled LOW To test local wake up fun...

Page 12: ...n specific voltage level such as via a pull up resistor to BAT in the evaluation setup Red LED D4 connected in series with resistor R5 turns on when LIMP is triggered UJA1169A UJA1169Ax EVB LIMP pin 1...

Page 13: ...connected to the RSTN pin on the UJA1169A is also accessible on J3 and J5 UJA1169A UJA1169Ax EVB TXD pin 2 J3 01 or J4 18 RXD pin 7 J3 02 or J4 20 SDO pin 9 J3 03 or J4 09 SDI pin 3 J3 04 or J4 07 SCK...

Page 14: ...ds A reset event is triggered by a LOW level on RSTN Details of reset functionality can be found in the UJA1169A data sheet 1 and application hints 2 UJA1169A UJA1169Ax EVB RSTN pin 8 J3 09 or J5 05 c...

Page 15: ...For the UJA1169AXF EVB connect VEXT J3 10 to the peripheral loads that need a 5 V supply optional Once the above steps have been completed the ECU EVB can be powered up using an external battery supp...

Page 16: ...SDO 2 SILK RXD SILK SCK SILK SDI 1 J3 SILK TXD HDR_1X2 JUMPER DEFAULT ON 2 1 J8 2 1 J7 20 18 16 14 12 10 8 6 4 2 19 17 15 13 11 9 7 5 3 1 2 4 6 8 10 12 14 16 J4 HDR_2X8 1 3 5 7 9 RSTN IOREF SILK IOREF...

Page 17: ...FAULT ON 2 1 J8 2 1 J7 20 18 16 14 12 10 8 6 4 2 19 17 15 13 11 9 7 5 3 1 2 4 6 8 10 12 14 16 J4 HDR_2X8 1 3 5 7 9 RSTN IOREF SILK IOREF SILK GND SILK RST SILK VIN SILK 12 V SILK V1 SILK VIN 11 13 15...

Page 18: ...DEFAULT ON 2 1 J8 2 1 J7 20 18 16 14 12 10 8 6 4 2 19 17 15 13 11 9 7 5 3 1 2 4 6 8 10 12 14 16 J4 HDR_2X8 1 3 5 7 9 RSTN IOREF SILK IOREF SILK GND SILK RST SILK VIN SILK 12 V SILK V1 SILK VIN 11 13 1...

Page 19: ...0V PANASONIC preferred CR1206J 000ELF BOURNS alternative CR12064W000T VENKEL COMPANY alternative 15 1 R4 0 RES MF ZERO 1 4 W 1206 WR12X000 PTL WALSIN TECHNOLOGY CORP alternative ERJ 3GEYJ103V PANASONI...

Page 20: ...NIC preferred CR1206J 000ELF BOURNS alternative CR12064W000T VENKEL COMPANY alternative 15 1 R4 0 RES MF ZERO 1 4 W 1206 WR12X000 PTL WALSIN TECHNOLOGY CORP alternative ERJ 3GEYJ103V PANASONIC preferr...

Page 21: ...ONIC preferred CR1206J 000ELF BOURNS alternative CR12064W000T VENKEL COMPANY alternative 15 1 R4 0 RES MF ZERO 1 4 W 1206 WR12X000 PTL WALSIN TECHNOLOGY CORP alternative ERJ 3GEYJ103V PANASONIC prefer...

Page 22: ...can be downloaded from www nxp com It includes the flexGUI PC installer see also Section 6 3 FlexGUI firmware for all supported microcontroller boards see also Section 6 2 1 6 2 Preparations for using...

Page 23: ...s for firmware programming Figure 21 PC connection for firmware programming Figure 22 Copying the firmware file to the EVB S32K144 drive UM11758 All information provided in this document is subject to...

Page 24: ...ls try again after a power off wait 3 seconds power on sequence on the UJA1169Ax EVB Once the FlexGUI firmware has been installed on the microcontroller board the jumpers on the boards need to be set...

Page 25: ...3 of header J104 are connected with a jumper pushbutton SW5 on the MCU board allows the RSTN signal to be pulled LOW manually This function could be used for example when restoring the MTPNV register...

Page 26: ...s the status while the FlexGUI configuration is being loaded Figure 27 Once loading is complete the FlexGUI start up window is displayed Figure 28 The red text in the lower left corner of the window i...

Page 27: ...Figure 27 Window displayed during start up Figure 28 FlexGUI start up window boards not yet connected UM11758 All information provided in this document is subject to legal disclaimers NXP B V 2022 All...

Page 28: ...rt to enable the connection The text in the lower left corner of the window should turn from red to green to indicate that the session has started successfully Figure 29 The FlexGUI functionality can...

Page 29: ...for the microcontroller pins that control the red green and blue color components of the RGB LED on the microcontroller board A Low value selects a component a High value turns it off Figure 30 Intera...

Page 30: ...t column If option Tree View is selected a single register may be selected Tree View is selected via the FlexGUI pop up window accessed under File Settings see Figure 32 Figure 32 Register map display...

Page 31: ...prior read access is shown in the bottom row Figure 33 Advanced options for register map Register data is displayed in three formats As a single hexadecimal value for the entire register In text form...

Page 32: ...ximum number of registers displayed via control field Registers Per Page see Figure 32 Figure 35 shows an example Register map view displaying the second page of the Transceiver control register group...

Page 33: ...If a register has not been previously written to the selected rows are reinitialized with the default values as selected via the Use Register Init Value checkbox see Figure 33 For each register an OK...

Page 34: ...gged in the Results window If the infinity option is selected when the script is executed it runs continuously in a loop The button changes to when a script is running Execution continues until halted...

Page 35: ...ul Set default reset length to maximum and no auto start of VEXT SET_REG UJA1169AXF MTPNV and ID Registers Start up control 0x00 Set Software Development mode allow Sleep mode and set max reset thresh...

Page 36: ...8 FlexGUI FINEST detail level selected for log window If the log window is not displayed click on the slider symbol under the File menu UM11758 All information provided in this document is subject to...

Page 37: ...delay This needs to be taken into account when testing the Sleep mode command using the Register map tab or when executing scripts that include a Sleep mode command To resume GUI operation after the S...

Page 38: ...is chip https www nxp com docs en data sheet UJA1169A pdf 2 AH1902 application hints Mini high speed CAN system basis chips UJA116xA available from NXP Semiconductors UM11758 All information provided...

Page 39: ...software package overview 22 6 2 Preparations for using the S32K144EVB as a USB interface 22 6 2 1 FlexGUI firmware installation on S32K144EVB 22 6 2 2 HW setup for FlexGUI operation 24 6 3 Installin...

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