NXP Semiconductors T2080RDB-PC, User Manual, Page: 34 / 47

2.18 DIP switch definition
The T2080RDB-PC board has user selectable switches, for evaluating different boot
configurations and other special configurations for this device.
This configuration allows either the switch or the CPLD register to set the POR pin. The
CPLD register allows software to override the pin remotely when the board is in the
board farm.
In order to use the CPLD override option, software sets an override bit, that allows the
CPLD to override the switch setting during power on reset.
T2080
POR & Override
CPLD Register
CPLD
cfg_xxx
switch
Figure 2-18. DIP switch definition
Table 2-9 shows how POR configuration is done through switches.
Table 2-9. POR configuration through switches
Switch Signal name Pin name Signal meaning Setting
SW1[1:8] cfg_rcw_src[0:7] IFC_AD[8:15] Reset Configuration word source.
For details, see T2080 Integrated
Multicore Communications
Processor Family Reference
Manual
(document T2080RM)
NOR boot: 00010011_1
NAND boot: 10000010_1
SPI boot: 00100010_1
SD boot: 00100000_0
SW2[1] cfg_rcw_src[8] IFC_CLE Reset Configuration word source For details, see T2080
Integrated Multicore
Communications Processor
Family Reference Manual
(document T2080RM)
SW2[2] cfg_ifc_te IFC_TE IFC external transceiver enable
polarity select 0: IFC drives logic 1 for TE
assertion
Table continues on the next page...
DIP switch definition
QorIQ T2080 Reference Design Board (T2080RDB-PC) User Guide, Rev. 0, 04/2016
34 Freescale Semiconductor, Inc.