NXP Semiconductors
UM11603
RDGD31603PHSEVM three-phase inverter reference design
4.4 3.3 V to 5.0 V translator board
KITGD3160TREVB translator enables level shifting of signals from MCU 3.3 V to 5.0 V
SPI communication.
Figure 11. Translator board
Jumper
Position
Function
1-2
selects 5.0 V for 5.0 V compatible gate drive
VCCSEL (J3)
2-3
selects 3.3 V for 3.3 V compatible gate drive
1-2
selects PWM high-side control from KL25Z MCU
PWMH_SEL (J4)
2-3
selects PWM high-side control from fiber optic receiver inputs
1-2
selects PWM low-side control from KL25Z MCU
PWML_SEL (J5)
2-3
selects PWM low-side control from fiber optic receiver inputs
Table 7. Translator board jumper definitions
4.5 Schematic, board layout and bill of materials
The schematic, board layout and bill of materials for the RDGD31603PHSEVM reference
design are available at
http://www.nxp.com/RDGD31603PHSEVM
.
UM11063
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2021. All rights reserved.
User manual
Rev. 1 — 18 August 2021
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