NXP Semiconductors
PT2001SWUG
PT2001 programming guide and instruction set
PT2001SWUG
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User guide
Rev. 3.0 — 29 April 2019
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toint
Description:
Convert the two's complement value contained in op1 register to integer format.
The toint instruction retains the original value in the operand register op1 when its MSB
bit is zero. If the MSB is 1, then it returns the two's complement of the operand register
(op1[14:0]).
The toint instruction also saves the MSB of the operand op1 in the conversion bit CS of
the arithmetic condition register arith_reg.
The MSB of the operand is either XORed with the existing conversion bit CS of the ALU
condition register (if the instruction is called with the _rst parameter) or replaces it (if the
instruction is called with the rst parameter).
Assembler syntax:
toint op1 Rst;
Operands:
•
op1 – One of the registers listed in the operand
•
Rst – Operand defines if the conversion bit CS of the ALU condition register is reset
Operand label
Operand description
_rst
The existing conversion bit CS is XORed with the op1 MSB
rst
The existing conversion bit CS is set according to the op1 MSB
Condition register:
•
CS – Last conversion sign
Table 125. toint instruction format
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
0
0
1
1
0
1
1
1
0
0
1
0
Rst
op1
