NXP Semiconductors P4080, User Manual, Page: 8 / 60

P4080 Development System User’s Guide, Rev. 0
8 Freescale Semiconductor
Architecture
card, such as Freescale’s Komodo card, either stand-alone or in coordination with the ngPIXIS. This table
lists an overview example of the steps required to accomplish this.
5 Architecture
The P4080DS architecture is primarily determined by the P4080 processor, and by the need to provide
“typical,” OS-dependent resources (disk, Ethernet, and so on).
5.1 Processor
This table lists the major pin groupings of the P4080.
Table 2. AVP Execution Steps
Step Details
Assert Target Reset Set target reset Control card asserts “flying lead” reset line; alternately, the
ngPIXIS register bit PX_RST[RSTL] is set to ‘0’.
Target processor (not the system) is reset.
Setup New Target Environment Set target core VDD VCTL[VCORE]=1
VCORE=xxxxxxxx
Set requested SYSCLK VCTL[SYSCLK]=1
VSPEED[SYS]=xxx
Restart Target Set target reconfiguration VCTL[GO]=1
System is reconfigured, target processor remains in reset. This may take several milliseconds.
Download Target Download to target execution space. Presumably the DDR and PCIExpress resources were
configured by the I
2
C sequencer. If so, a PCIMaster such as the DataBlizzard can simply write
test code to system memory via PCI->DDR path.
Release Target Reset Release target reset Control card deasserted “flying lead” reset line; alternately
the ngPIXIS register bit PX_RST[RSTL] is set to ‘1’.
Target processor executes code.
Collect Results Results can be extracted from system DDR, PCI Express graphics memory (used as a buffer),
or other memory (SDMedia, Flash, PromJet).
Table 3. P4080 Pin Groupings Summary
Signal Group Details
Memory Controllers Section 5.1.1, “DDR ”
SerDes x18 Section 5.1.2, “SerDes x18 ”
Ethernet Section 5.1.3, “Ethernet (EC) ”
IEEE 1588 Section 5.1.4, “Support for IEEE Std 1588
™
Protocol ”
Local Bus Section 5.1.5, “Local Bus ”
eSDHC Section 5.1.6, “eSDHC ”
SPI Section 5.1.7, “SPI Interface ”
USB Section 5.1.8, “USB Interface ”
DMA Section 5.1.9, “DMA Controller ”