D
C
B
A
5
4
3
2
1
MPC5748G Low Cost Evaluation Board (MPC5748G-LCEVB)
Revision Information
Table Of Contents:
Rev
Date
Designer
Comments
x1
14 Apr 2015
Alasdair Robertson
Start of capture, Working version (256BGA)
D
Power - Main input and 3.3V regulator
Sheet 2
x2
08 May 2015
Alasdair Robertson
Changed to 176 QFP Package and changed periperhal Matrix
Power - MCU Power
Sheet 3
x3
18 May 2015
Alasdair Robertson
Changes required for initial placement
Power - MCU Decoupling
Sheet 4
x4
19 May 2015
Alasdair Robertson
Tidy Up, Replaced some "hard to source" components
Reset and JTAG
Sheet 5
x5
26 May 2015
Alasdair Robertson
Renumber and Back Annoted from Layout
Clocks
Sheet 6
x6
27 May 2015
Alasdair Robertson
Correction to GND on 3v3 Regulator circuit
MCU GPIO 1
Sheet 7
x7
29 May 2015
Alasdair Robertson
Correction to CAN Test points
MCU GPIO 2
Sheet 8
x8
31 May 2015
Alasdair Robertson
Few refdes changes after layout tweaks
Comms1 - CAN and LIN
Sheet 9
x9
01 Jun 2015
Alasdair Robertson
Correction to user LED Refdes after re-number
Comms 2 - FTDI RS232 Interface
Sheet 10
x10
01 Jun 2015
Alasdair Robertson
DNP Jumpers. 0 Ohm resistors added accross LIN jumpers
Comms 3 - USB Host Interface (device footprints only)
Sheet 11
A
11 Jun 2015
Andrew MacDonald
Prototype Manufacture Release
Comms 4 - Ethernet (MII Mode)
Sheet 12
AX1
29 Sep 2015
Alasdair Robertson
Prodn Build changes (LIN0 default to Slave, LIN1 Master only)
Comms 5 - FlexRay
Sheet 13
PN Changed to MPC5748G-LCEVB
C
User - Switches, LED's and Potentiometer
Sheet 14
AX2
26 Oct 2015
Alasdair Robertson
Change to JTAG Pulls to meet latest RM Spec
User - GPIO Pin Matrix
Sheet 15
AX3
29 Oct 2015
Alasdair Robertson
Changed RV1 current limit resistor. SW4 / SW5 refdes swap
AX4
09 Dec 2015
Alasdair Robertson
Pull DOWN on TCLK to mitigate against STANDBY exit issue.
AX5
20 Jan 2016
Alasdair Robertson
Updated NXP Logos
B
12 Feb 2016
Alasdair Robertson
Updated NXP Logos
Caution:
These schematics are provided for reference purposes only.
As such,NXP does not make any warranty, implied or otherwise, as to the
suitability of circuit design or component selection (type or value) used in
these schematics for hardware design using the NXP Calypso family of
B
Microprocessors. Customers using any part of these schematics as a
3 Different test points used in design:
basis for hardware design, do so at their own risk and NXP does not
TPVx - Through Hole Pad small
assume any liability for such a hardware design.
TPHx - Through Hile Pad Large (for standard 0.1" header).
Also
used on IO Matrix (IOMx)
TPX
- Surface Mount Wire Loop
Notes:
- All components and board processes are to be ROHS compliant
- All small capacitors are 0402 unless otherwise stated
- All resistors are 0603 5% 0.1w unless otherwise stated. All zero ohm links are 0603
- All connectors and headers are denoted Px and are 2.54mm pitch unless otherwise stated
Automotive Microcontroller Applications
- All jumpers are denoted Jx. Jumpers are 2mm pitch
East Kilbride, Scotland
- Jumper default positions are shown in the schematics. For 3 way jumpers, default is always posn 1-2.
2 Pin jumpers generally have the "source" on pin 1.
NXP General Business Use
- All switches are denoted SWx
This document contains information proprietary to NXP and shall not be used for engineering design,
A
- All test points (SMT wire loop style) are denoted TPx
without the express written permission of NXP Semiconductors.
- Test point Vias (just through hole pads) are denoted TPVx
procurement or manufacture in whole or in part
Freescale AISG Applications, East Kilbride
Signals (ports) have not been routed via busses as this makes it harder to determine where each signal goes.
Designer:
Drawing Title:
A. Robertson
MPC5748G-LCEVB
User notes are given throughtout the schematics.
Drawn by:
Page Title:
A. Robertson
Index and Title Page
Specific PCB LAYOUT notes are detailed in ITALICS
Approved:
Size
Document Number
PDF: SPF-27897
Rev
A. Robertson
B
SCH-27897
B
Date:
Friday, February 12, 2016
Sheet 1of
15
5
4
3
2
1
Downloaded from
Downloaded from
Downloaded from
Downloaded from
Downloaded from
Downloaded from
Downloaded from
Downloaded from
Downloaded from
Downloaded from
Downloaded from
Downloaded from
Downloaded from
Downloaded from
Downloaded from
Downloaded from
Downloaded from
Downloaded from
Downloaded from
