NXP Semiconductors MC9S08QL4, Reference Manual

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Chapter 3 Modes of Operation
MC9S08QL8 MCU Series Reference Manual, Rev. 1
NXP Semiconductors 33
Figure 3-1. Allowable Power Mode Transitions for the MC9S08QL8 Series
Figure 3-1 illustrates mode state transitions allowed between the legal states shown in Table 3-1 .
PTA5/IRQ/TCLK/RESET must be asserted low in order to exit stop2. Interrupts suffice for the other stop
and wait modes.
Table 3-3 defines triggers for the various state transitions shown in Figure 3-1 .
Table 3-3. Triggers for Transitions Shown in Figure 3-1
Transition # From To Trigger
1 RUN LPRUN Configure settings shown in Table 3-1 , switch LPR=1 last
LPRUN RUN Clear LPR
Interrupt when LPWUI=1
2 RUN STOP2 Pre-configure settings shown in Table 3-1 , issue STOP
instruction
STOP2 RUN assert zero on PTA5/IRQ/TCLK/RESET
1
, reload
environment from RAM
3 LPRUN LPWAIT WAIT instruction
LPWAIT LPRUN Interrupt when LPWUI=0
4 LPRUN STOP3 STOP instruction
STOP3 LPRUN Interrupt when LPWUI=0
5 LPWAIT RUN Interrupt when LPWUI=1
RUN LPWAIT Not supported
6 RUN WAIT WAIT instruction
WAIT RUN Interrupt or reset
Mode Regulator State
RUN Full on
WAIT Full on
LPRUN Standby
LPWAIT Standby
STOP3 Standby
STOP2 Partial powerdown
STOP3
1
STOP2
LPWAIT WAIT
RUN LPRUN
4 7
6
2
5 3