Interfacing an LCD to the MC9S08LC60, Rev. 0
Example Application Using the DEMO9S08LC60
Freescale Semiconductor
18
4.2
Example Application Software Overview
This section provides an overview of the configuration of the example application demo. The overview
reviews settings for:
•
ICG
•
SCI
•
LCD
These LCD drivers are a subset of the application. The application could be an energy meter or a toy.
The goal of this section is not to describe every function in detail. Instead, only select functions will be
described. For example, a description will be provided for the implementation of a procedure for the
mapping of the MCU LCD RAM to alphanumeric segment groups as described in the previous section.
4.2.1
ICG Configuration
The ICG has four possible configurations, including the following three modes:
•
FLL bypassed, external clock (FBE) mode
•
FLL engaged, internal clock (FEI) mode
•
FLL engaged, external clock (FEE) mode
Both FBE and FEE use the on-board 32.768 kHz crystal on the DEMO9S08LC60. For these modes, the
DEMO9S08LC60 CLK ENA jumper must be installed. For the lowest power mode, the FBE mode is
recommended. If the use of the LCD in stop3 is desired, FBE mode is also recommended. If lower
system/BOM (bill of materials) cost is the priority, the FEI mode should be used. Cpu.h defines variables
to select the desired ICG clock mode.
While the demo software is pre-configured to use the ICG FBE mode, the demo project can be modified
so that the user can also operate the demo in FEI and FEE ICG modes. When using either FEI and FEE
ICG modes, the demo uses a faster SCI baud setting (9600 bps). The code excerpt below from Cpu.h shows
the ICG options built-in to the project.
//=======================================================
//Select a clock mode
//=======================================================
//FBE = FLL ByPassed External Clock
#define FBE_32KHZ
1 /* 32 kHz crystal and 16 kHz fbus */
//FEE = FLL Enabled using External Clock
#define FEE_32K8BUS
0 /* 32 kHz crystal and 8.39 MHz fbus */
#define FEE_32K16BUS
0 /* 32 kHz crystal and 16.775 MHz fbus */
//FEI = FLL Enabled Internal Clock
#define FEI_8MBUS
0 /* fbus 17.77/2 MHz; untrimmed */
