UM11029
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© NXP Semiconductors N.V. 2017. All rights reserved.
User manual
Rev. 1.0 — 16 June 2017
393 of 515
NXP Semiconductors
UM11029
Chapter 21: LPC84x SCTimer/PWM
21.6.11 SCTimer/PWM match/capture mode register
If UNIFY = 1 in the CONFIG register, only the _L bits of this register are used. In this case,
REGMODE_H is not used.
If UNIFY = 0 in the CONFIG register, this register can be written to as two registers
REGMODE_L and REGMODE_H. Both the L and H registers can be read or written
individually or in a single 32-bit read or write operation. The _L bits/registers control the L
match/capture registers, and the _H bits/registers control the H match/capture registers.
The SCTimer/PWM contains multiple Match/Capture registers. The Register Mode
register selects whether each register acts as a Match register (see
) or as
). Each Match/Capture register has an
accompanying register which functions as a Reload register when the primary register is
used as a Match register (
) or as a Capture-Control register (event select)
when the register is used as a capture register (
). REGMODE_H is used
only when the UNIFY bit is 0.
16
SIN0
Input 0 state. Input 0 state following the synchronization specified
by INSYNC0.
-
17
SIN1
Input 1 state. Input 1 state following the synchronization specified
by INSYNC1.
-
18
SIN2
Input 2 state. Input 2 state following the synchronization specified
by INSYNC2.
-
19
SIN3
Input 3 state. Input 3 state following the synchronization specified
by INSYNC3.
-
20
SIN4
Input 4 state. Input 4 state following the synchronization specified
by INSYNC0.
-
31:21
-
Reserved
-
Table 394. SCTimer/PWM input register (INPUT, offset 0x048) bit description
Bit
Symbol
Description
Reset
value
Table 395. SCTimer/PWM match/capture mode register (REGMODE, offset 0x04C) bit
description
Bit
Symbol
Description
Reset
value
7:0
REGMOD_L
Each bit controls one match/capture register (register 0 = bit 0,
register 1 = bit 1,..., register = bit 7).
0 = register operates as match register.
1 = register operates as capture register.
0
15:8
-
Reserved.
-
23:16 REGMOD_H
Each bit controls one match/capture register (register 0 = bit 16,
register 1 = bit 17,..., register 7 = bit 23).
0 = register operates as match registers.
1 = register operates as capture registers.
0
31:24 -
Reserved.
-
