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NXP Semiconductors

UM11587

KITVR5510xA0EVM Evaluation Kit User Guideline

Rev

Date

Description

v.1

20210503

Initial version

Modifications NA

Revision history

UM11587

All information provided in this document is subject to legal disclaimers.

© NXP B.V. 2021. All rights reserved.

User manual

Rev. 1 — 3 May 2021

2 / 32

Summary of Contents for KITVR5510 A0EVM Series

Page 1: ...Keywords VR5510 KITVR5510xA0EVM evaluation kit automotive multi output power management integrated circuit Abstract This user manual describes how to use the KITVR5510xA0EVM evaluation kit The VR5510...

Page 2: ...Kit User Guideline Rev Date Description v 1 20210503 Initial version Modifications NA Revision history UM11587 All information provided in this document is subject to legal disclaimers NXP B V 2021 A...

Page 3: ...in the evaluation design implementation and validation of VR5510 Power Management Integrated Circuit PMIC for high performance applications The scope of this document is to provide the user with info...

Page 4: ...and tools parametrics ordering information and a Getting Started tab The Getting Started tab provides quick reference information applicable to using the KITVR5510xA0EVM evaluation board including the...

Page 5: ...5 0 V to 24 0 V and current limit set initially to 100 mA Two power supply cables with banana connectors at one end 3 3 Windows PC workstation This evaluation board requires a Windows PC workstation...

Page 6: ...evice The KITVR5510xA0EVM includes NXPs FRDM K82F development platform board The FRDM K82F attaches to the bottom of the board and serves as the communication interface between the KITVR5510xA0EVM and...

Page 7: ...eleased D6 Green RSTB_G External RSTB signal RSTB released D12 Red RSTB_R External RSTB signal RSTB asserted low D13 Red PGOOD_R External PGOOD signal PGOOD asserted low D14 Red INTB External INTB sig...

Page 8: ...Figure 2 Connectors Figure 2 shows all of the connectors on the KITVR5510xA0EVM Pinouts for individual connectors are shown in the schematic UM11587 All information provided in this document is subjec...

Page 9: ...11 Debug mode selection 2 3 shorted default GND to normal mode 1 2 shorted 7P5V generated from VBAT VIN directly J12 Debug mode selection 2 3 shorted default 7P5V generated from an onboard regulator 1...

Page 10: ...default open 1 2 shorted default VMON1 VPRE 3 3 V 3 4 shorted default VMON2 BUCK3 1 1 V 5 6 shorted default VMON3 LDO2 1 8 V 7 8 shorted default VMON4 LDO1 1 8 V 9 10 shorted VMON4 BOOST 5 V J101 Regx...

Page 11: ...horted default BUCK2 in both Single and Multiphase Table 2 Jumpers continued 4 3 4 Test points Figure 4 shows the location and the function of the test points on the KITVR5510xA0EVM board Figure 4 Tes...

Page 12: ...Kit User Guideline 5 Layout Figure 5 KITVR5510xA0EVM layout top Figure 6 KITVR5510xA0EVM layout layer 2 UM11587 All information provided in this document is subject to legal disclaimers NXP B V 2021 A...

Page 13: ...ion Kit User Guideline Figure 7 KITVR5510xA0EVM layout layer 3 Figure 8 VR551 xA0EVM layout layer 4 UM11587 All information provided in this document is subject to legal disclaimers NXP B V 2021 All r...

Page 14: ...n Kit User Guideline Figure 9 KITVR5510xA0EVM layout layer 5 Figure 10 KITVR5510xA0EVM layout layer 6 UM11587 All information provided in this document is subject to legal disclaimers NXP B V 2021 All...

Page 15: ...n Kit User Guideline Figure 11 KITVR5510xA0EVM layout layer 7 Figure 12 KITVR5510xA0EVM layout bottom UM11587 All information provided in this document is subject to legal disclaimers NXP B V 2021 All...

Page 16: ...26 C66 C67 C94 C102 C176 C177 0 1 F CAP CER 0 1 F 50 V 10 X7R AEC Q200 0402 GCM155R71H104KE02 MURATA 1 C162 0 047 F CAP CER 0 047 F 50 V 10 X7R AEC Q200 0603 CGA3E2X7R1H473K 080AA TDK 1 C163 47 F CAP...

Page 17: ...02 RK73H1ETTP6203F KOA SPEER 1 R252 115 K RES MF 115 K 1 10 W 1 AEC Q200 0402 RK73H1ETTP1153F KOA SPEER 1 R258 1 00 K RES MF 1 00 K 1 10 W 0 1 AEC Q200 0603 ERA3AEB102V PANASONIC 1 R259 10 K RES MF 10...

Page 18: ...1 0 H IND PWR 1 0 H 100KHz 17 9A 20 AEC Q200 SMD SPM6545VT 1R0M D TDK 3 L4 L5 L6 1 0 H IND PWR 1 0 H 1 MHZ 4 7A 20 AEC Q200 SMD TFM252012ALMA1R0 MTAA TDK 1 L7 4 7 H IND PWR 4 7 H 100 kHz 11A 20 AEC Q2...

Page 19: ...m board 3 Drag and drop the downloaded file 0244_k20dx_bootloader_update_0x8000 bin into the BOOTLOADER drive Note Ensure that enough time is allowed for the firmware to be saved in the boot loader 4...

Page 20: ...ry DAPLink bootloader update 4 Disable the storage services Run services msc then double click on the storage service from the list and press the stop button 5 Press the RST push button on the Freedom...

Page 21: ...ot available during the development phase the following steps can be taken to operate the PMIC in different modes 1 If the FRDM K82F board must be programmed or if the firmware must be flashed again f...

Page 22: ...ating with VR5510 on the reference board follow the steps in Section 7 3 Connecting to the KITVR5510xA0EVM board Figure 14 Connecting to a reference board with K82F only UM11587 All information provid...

Page 23: ...the NXPGUI tool 1 To open the OTP configuration tool click the OTP icon on the left side of the NXPGUI The OTP tool can be used independently of the EV kit board status the board does not have to be...

Page 24: ...be in position 2 ON Set SW2 to ON position enables the debug mode of operation Turns on the part in debug mode 6 When the PMIC is ON verify the debug mode of operation by reading the FS_STATES 0x18 re...

Page 25: ...follow the steps mentioned in Section 8 1 Operating in debug mode An OTP script can be created using the OTP section of the tool as explained above in Section 8 1 Operating in debug mode 1 Follow step...

Page 26: ...ramming separately then select the target state machine and click the program button Follow the instructions 7 If the OTP fuse burning was successful the progress is updated and the fuse box status is...

Page 27: ...User Guideline burning power cycle the board and check if the part turns on with the expected configuration UM11587 All information provided in this document is subject to legal disclaimers NXP B V 20...

Page 28: ...pdf VR5510 Data sheet VR5510 Multi Output PMIC with SMPS and LDO data sheet https www nxp com docs en data sheet VR5510 pdf VR5510 Safety Manual VR5510 Multi Output PMIC with SMPS and LDO Safety manua...

Page 29: ...customer s third party customer s NXP does not accept any liability in this respect Terms and conditions of commercial sale NXP Semiconductors products are sold subject to the general terms and condi...

Page 30: ...r Guideline Tables Tab 1 LEDs 7 Tab 2 Jumpers 9 Tab 3 Bill of Materials KITVR5510MA0EVM 16 Tab 4 References 28 UM11587 All information provided in this document is subject to legal disclaimers NXP B V...

Page 31: ...14 Fig 11 KITVR5510xA0EVM layout layer 7 15 Fig 12 KITVR5510xA0EVM layout bottom 15 Fig 13 Freedom board 19 Fig 14 Connecting to a reference board with K82F only 22 Fig 15 NXP GUI OTP configuration t...

Page 32: ...ring Software and Tools 19 7 1 Freedom board BOOTLOADER refresh in a Windows 7 system 19 7 2 Freedom Board BOOTLOADER Refresh in a Windows 10 System 20 7 3 Connecting to the KITVR5510xA0EVM board 21 7...

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