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Memory Map and Registers
The memory map comprises of 32-bit aligned registers which can be accessed via 8-bit,
16-bit, or 32-bit accesses. Write access to reserved locations will generate a transfer error.
Read access to reserved locations will also generate a transfer error and the read data bus
will show all 0s. The Memory Map and complete module is in Big Endian format.
The module will not check for correctness of programmed values in the registers and
software must ensure that correct values are being written.
LPIT memory map
Absolute
address
(hex)
Register name
Width
(in bits)
Access Reset value
Section/
page
4003_0000 Version ID Register (LPIT0_VERID)
32
R
0100_0000h
4003_0004 Parameter Register (LPIT0_PARAM)
32
R
4003_0008 Module Control Register (LPIT0_MCR)
32
R/W
0000_0000h
4003_000C Module Status Register (LPIT0_MSR)
32
w1c
0000_0000h
4003_0010 Module Interrupt Enable Register (LPIT0_MIER)
32
R/W
0000_0000h
4003_0014 Set Timer Enable Register (LPIT0_SETTEN)
32
R/W
0000_0000h
4003_0018 Clear Timer Enable Register (LPIT0_CLRTEN)
32
W
(always
reads 0)
0000_0000h
4003_0020 Timer Value Register (LPIT0_TVAL0)
32
R/W
0000_0000h
4003_0024 Current Timer Value (LPIT0_CVAL0)
32
R
FFFF_FFFFh
4003_0028 Timer Control Register (LPIT0_TCTRL0)
32
R/W
0000_0000h
4003_0030 Timer Value Register (LPIT0_TVAL1)
32
R/W
0000_0000h
4003_0034 Current Timer Value (LPIT0_CVAL1)
32
R
FFFF_FFFFh
4003_0038 Timer Control Register (LPIT0_TCTRL1)
32
R/W
0000_0000h
4003_0040 Timer Value Register (LPIT0_TVAL2)
32
R/W
0000_0000h
4003_0044 Current Timer Value (LPIT0_CVAL2)
32
R
FFFF_FFFFh
4003_0048 Timer Control Register (LPIT0_TCTRL2)
32
R/W
0000_0000h
4003_0050 Timer Value Register (LPIT0_TVAL3)
32
R/W
0000_0000h
4003_0054 Current Timer Value (LPIT0_CVAL3)
32
R
FFFF_FFFFh
4003_0058 Timer Control Register (LPIT0_TCTRL3)
32
R/W
0000_0000h
28.3
Chapter 28 Low Power Interrupt Timer (LPIT)
K32 L2A Reference Manual, Rev. 2, 01/2020
NXP Semiconductors
747
Summary of Contents for K32 L2A Series
Page 2: ...K32 L2A Reference Manual Rev 2 01 2020 2 NXP Semiconductors...
Page 42: ...K32 L2A Reference Manual Rev 2 01 2020 42 NXP Semiconductors...
Page 122: ...Flash Memory Clock K32 L2A Reference Manual Rev 2 01 2020 122 NXP Semiconductors...
Page 158: ...Debug and security K32 L2A Reference Manual Rev 2 01 2020 158 NXP Semiconductors...
Page 174: ...Module Signal Description Tables K32 L2A Reference Manual Rev 2 01 2020 174 NXP Semiconductors...
Page 246: ...Application information K32 L2A Reference Manual Rev 2 01 2020 246 NXP Semiconductors...
Page 374: ...CMP Trigger Mode K32 L2A Reference Manual Rev 2 01 2020 374 NXP Semiconductors...
Page 384: ...Functional description K32 L2A Reference Manual Rev 2 01 2020 384 NXP Semiconductors...
Page 592: ...Application Information K32 L2A Reference Manual Rev 2 01 2020 592 NXP Semiconductors...
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