NXP Semiconductors K32 L2A Series, Reference Manual, Page: 1348 / 1379

53.1.4 VREF Signal Descriptions
The following table shows the Voltage Reference signals properties.
Table 53-1. VREF Signal Descriptions
Signal Description I/O
VREF_OUT Internally-generated Voltage Reference output O
NOTE
When the VREF output buffer is disabled, the status of the
VREF_OUT signal is high-impedence.
Memory Map and Register Definition
VREF memory map
Absolute
address
(hex)
Register name
Width
(in bits)
Access Reset value
Section/
page
4007_2000 VREF Trim Register (VREF_TRM) 8 R/W See section 53.2.1/1348
4007_2001 VREF Status and Control Register (VREF_SC) 8 R/W 00h 53.2.2/1350
4007_2005 VREF Trim Register 4 (VREF_TRM4) 8 R/W 00h 53.2.3/1351
53.2.1 VREF Trim Register (VREF_TRM)
This register contains the trim data for the Voltage Reference.
Address: 4007_2000h base + 0h offset = 4007_2000h
Bit 7 6 5 4 3 2 1 0
Read
FLIP CHOPEN TRIM
Write
Reset
0 0 x* x* x* x* x* x*
* Notes:
x = Undefined at reset. •
VREF_TRM field descriptions
Field Description
7
FLIP
Reverses the amplifier polarity. FLIP can be used to test bandgap amplifier offset. The trim value is stored
in IFR and loaded out of reset.
Table continues on the next page...
53.2
Memory Map and Register Definition
K32 L2A Reference Manual, Rev. 2, 01/2020
1348 NXP Semiconductors