NXP Semiconductors K32 L2A Series, Reference Manual, Page: 1351 / 1379

VREF_SC field descriptions (continued)
Field Description
TMUXEN bit is accessible only in functional test mode.
0 Disabled
1 Enabled
2
VREFST
Internal Voltage Reference stable
Indicates that the bandgap reference within the Voltage Reference module has finished its startup and
stabilization.
NOTE: VREFST bit is valid only when the chop oscillator is not being used.
0 The module is disabled or not stable.
1 The module is stable.
MODE_LV Buffer Mode selection
Selects the buffer modes for the Voltage Reference module.
00 Bandgap on only, for stabilization and startup
01 High power buffer mode enabled
10 Low-power buffer mode enabled
11 Reserved
53.2.3 VREF Trim Register 4 (VREF_TRM4)
This register contains the enable and trim for VREF 2.1V generation.
Address: 4007_2000h base + 5h offset = 4007_2005h
Bit 7 6 5 4 3 2 1 0
Read VREF2V1_
EN
0
TRIM2V1
Write
Reset 0 0 0 0 0 0 0 0
VREF_TRM4 field descriptions
Field Description
7
VREF2V1_EN
Internal Voltage Reference (2.1V) Enable
Enables the bandgap reference within the Voltage Reference module for generating the 2.1V output
0 VREF 2.1V is enabled
1 VREF 2.1V is disabled
6
Reserved
This field is reserved.
This read-only field is reserved and always has the value 0.
TRIM2V1 VREF 2.1V Trim Bits
These bits change the resulting VREF by approximately ± 1.5 mV for each step. The trim value is stored in
IFR and loaded out of reset.
Chapter 53 Voltage Reference (VREF)
K32 L2A Reference Manual, Rev. 2, 01/2020
NXP Semiconductors 1351