A
A
B
B
C
C
D
D
E
E
4
4
3
3
2
2
1
1
TA3
TA2
TA1
SPI #0
PWMB
SCI #0
TIMER CHANNEL C
TIMER CHANNEL D
TIMER CHANNEL A
CAN #1
A/D PORT B
PWMA
SPI #1
SCI #1
A/D PORT A
TA0
DATA BUS
ADDRESS CONTROL
A16
ADDRESS BUS
/CS2
/CS3
/CS0
/CS1
SCLK1
MOSI1
MISO1
/SS1
A22
A18
A20
A17
A19
A21
A23
/CS4
/CS6
/CS5
/CS7
CAN #2
CAN2_TX
CAN2_RX
QUAD-DECODER #1
QUAD-DECODER #0
&
&
DSCO De
si
gn
PROCESSOR PORT
EXPANSION CONNECTORS
MC56F8367EVM.DSN
1.0
10
14
Thurs
day
, Septem
ber 02, 2004
B
D
ig
ital Signal Controller Operation
2100 Eas
t Elliot R
oad
Tem
pe, Ariz
ona 85284
Tit
le
D
ocument
Date
:
Size
D
es
igner:
S
he
et
o
f
Rev.
Numbe
r
(512) 895-7215 FAX: (480) 413-2510
PW
MB0
PW
MB2
PW
MB4
PW
MB1
PW
MB3
PW
MB5
FA
U
LTB
0
FA
U
LTB
2
FA
U
LTB
1
FA
U
LTB
3
ISB0
ISB2
ISB1
PW
MA0
PW
MA2
PW
MA4
PW
MA1
PW
MA3
PW
MA5
FA
U
LTA
0
FA
U
LTA
2
FA
U
LTA
1
ISA0
ISA1
ISA2
MOSI
0
MI
SO0
SC
LK0
/SS0
PH
ASEB1
IN
D
EX1
PH
ASEA1
HOM
E
1
IN
D
EX0
HOM
E
0
PH
ASEB0
PH
ASEA0
TX
D
0
RX
D0
TX
D
1
RX
D1
TD
0
TD
1
TC
0
CA
N_T
X
CA
N_RX
AN
0
AN
1
AN
2
AN
3
AN
4
AN
5
AN
6
AN
7
AN
8
AN
9
AN
10
AN
11
AN
12
AN
13
AN
14
AN
15
/IR
Q
B
/IR
Q
A
/W
R
/R
D
/PS
PB0
PD
0
/D
S
A1
A3
A5
A7
A9
A1
1
A1
3
A1
5
A4
A6
A8
A1
0
A1
2
A1
4
A2
A0
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
D13
D14
D15
PB1
PB3
PB5
PB7
PB6
PB2
PB4
FA
U
LTA
3
/R
ST
O
/R
ESET
CLK
O
PD
2
PD
4
PD
1
PD
3
PD
5
PD
0
PD
1
TC
1
TD
2
TD
3
+3
.3
V
+3
.3
V
+3
.3
V
+5
.0
V
+5
.0
V
+3
.3
V
+3
.3
V
+3
.3
VA
+3
.3
VA
+3
.3
V
+3
.3
V
+3
.3
V
+3
.3
V
J8
1
3
5
7
9
11
13
2
4
6
8
10
12
14
J7
1
3
5
7
9
11
13
2
4
6
8
10
12
14
J1
1
1
3
5
2
4
6
J1
2
1
3
5
2
4
6
J1
5
1
3
5
2
4
6
J1
3
1
3
5
2
4
6
J1
4
1
3
5
2
4
6
J1
6
1
3
2
4
J1
8
1
3
2
4
J9
1
3
5
7
9
2
4
6
8
10
J1
0
1
3
5
7
9
2
4
6
8
10
J5
12
34
56
78
91
0
11
12
13
14
15
16
17
18
J4
1
3
5
7
9
11
13
15
17
19
21
23
25
2
4
6
8
10
12
14
16
18
20
22
24
26
J6
1
3
5
7
9
11
13
15
2
4
6
8
10
12
14
16
J1
9
1
3
2
4
J1
7
1
3
5
2
4
6
56F8367EVM Schematics, Rev. 2
Freescale Semiconductor
Appendix A-11
Preliminary
Figure
A-10. Processo
r Port
Expansion Connectors