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2775 Main Board
Section 4
Theory of Operation
Rev. 01
Model 2001 Service Manual
13
POWER key will toggle the Q1 output of IC10 and the monitor will turn off. This is done to
prevent corruption of RAM and Real Time Clock data.
Low Battery Voltage Shutdown
See sheet 4 of 4 on schematic.
The CPU monitors the battery voltage and provides the user with a low battery indicator,
messages and alarms. However, if these are ignored, a hardware circuit will take over and shut
off the monitor to prevent battery damage.
The pulse width modulator IC9 requires at least 7.6 volts at pin 7, its voltage supply, in order to
operate. This pin typically draws 10 mA of current. The resistance of the R63 and Q8
combination is approximately 114 ohms. This equates to a voltage drop of approximately 1.14
volts. Therefore if the battery voltage drops under 9.0 volts (approximately), IC9 will not have
sufficient voltage to operate and will shut down. Shutdown of IC9 stops current flow through
transformer T1 and the secondary supplies shut down, effectively turning off the monitor.
When IC9 shuts down, its VREF output at pin 8 is pulled Low. This forward biases D6 and
causes the NAND gate output at IC11 pin4 to go High. The #2 flip-flop of IC10 is clocked, and
the High at the D2 input (because Q1 is High) is transferred to the Q2 output at pin 13. The High
at pin 13 Sets the #1 flip-flop causing the Q1 pin 2 output to go Low. This Low shuts off both
MOSFETs Q7 and Q8, thereby blocking any supply voltage from IC9 pin 7. Normally, pressing
the front panel POWER key would clock flip-flop #1 (at pin 3) and return the pin 2 output High-
but the High output at pin 13 keeps the #1 flip-flop Set-and the POWER key has no effect.
If at this point the AC MAINS is reconnected, MOSFET Q8 continues to block current from IC9
pin 7 and the monitor remains off. Connecting the AC Mains does however send the LINEST
signal High. This High Line Status signal is brought to IC10 pin10 where it Resets the #2 flip-
flop, sending IC10 pin 13 Low and removing the Set condition from flip-flop #1. Now, if the front
panel POWER key is pressed, flip-flop #1 is clocked, IC11 pin11 goes High, MOSFETs Q7 and
Q8 turn on, the supply to IC9 pin 7 is restored, the pulse width modulator restarts, energizes
T1, and the monitor turns back on.
Timing Sequencer
See sheet 2 of 4 on schematic.
A 14 stage divider, IC39, acts as a timing sequencer. A 3.276 MHz crystal Y2, provides a Clock
(CLKSEQ) to IC39 pin 10. The RESET (IC39 pin 11) input resets IC39 on monitor power up.
The IC39 pin 9 Q1,output provides a clock input signal to the audio tone generator IC27. The
IC39 pin 3 Q14 output provides a 5 ms interrupt (INT5MS) for IC18. The Q4-Q11 outputs of
IC39 become inputs to the Data Sampling Controller IC42.
Data Sampling Controller
The IC39 Timing Sequencer’s Q4-Q11 outputs become inputs to IC42, a PEEL (Programmable
Electrically Erasable Logic) device. The PEEL uses the CLK and D0-D6 inputs, and the SC1
and SC2 inputs, to control data sampling by providing sensor LED drive signals and
demultiplexing for the signals returning from the saturation sensor.
The waveforms in Figure 1 (with the exception of CLK) are only valid when both the SC1 and
SC2 inputs are low. The System Calibration inputs (SC1 and SC2) generated by the
microprocessor, are kept low, except that they are toggled high/ low, during a Probe Off Patient
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