Install ISDN BRI hardware
Page 41 of 46
ISDN Basic Rate Interface
Installation
Figure 11
Clock reference cable connection
Clock recovery
The SILC is configured in the slave-slave mode when acting as a trunk
interface. This is set up through the Maintenance Signaling Channel (MSC).
The microcontroller configures the S/T chips on the SILC as appropriate.
The SILC may recover the network clock from the received data stream using
on-chip phase lock loops. The clock frequency which is recovered is 2.56
MHz. The jitter and wander conform to CCITT recommendations.
CE I/O panel
C
C
S
I
L
C
IPE I/O panel
NTND70AA
NTND71AA - AD
NTND72AA
IPE shelf
CE shelf
553-7702
Summary of Contents for 553-3901-200
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