Battery voltage is also used on the RF side for power amplifiers (GSM PA) and for RF ASICs N7500(Rx) & N7501
(Tx).
Discrete power supplies are used to generate 2.8 V to BT, 1.5 V for the camera IO voltage, 1.3V/1.5V for D4800
and 18V for the backlight LEDs.
The device supports both 1.8V/3 V SIM cards which are powered by N2200 / VSIM1. N2200s VSIM2 is used to
power RS MMC 1.8 V only. USB accessories which needs power from the device are powered by N2300 / VOUT.
Because LED driver in N2300 is not used, the external SMPS is used instead. External LED SMPS is still controlled
by N2300 and powered by battery voltage.
System power-up
After inserting the main battery, regulators started by HW are enabled. SW checks, if there is some reason to
keep the power on. If not, the system is set to power off state by watchdog. Power up can be caused by the
following reasons:
• Power key is pressed
• Charger is connected
• RTC alarm occurs
• MBUS wake-up
After that:
• N2200 activates sleep clock and VANA, VDRAM, VIO and VR1 regulators.
• Voltage appearing at N2200’s RSTX pin is used for enabling N2300 ASIC.
• N2300 enables VCORE regulator and its internal RC-oscillator (600kHz).
• VCTCXO regulator is set ON and RF clock (main system clock) is started to produce.
• N2200 will release PURX ~ 16ms after power up is enabled (the RF clock is then stable enough).
• Synchronizing clock (2.4MHz) for N2300 is started to be produced. After PURX is released and two rising
edges of 2.4MHz synchronous clock have been detected in SMPSClk input N2300 is starting to use that
instead of 600kHz internal RC-oscillator.
• HW start-up procedure has been finalized and the system is up and running. Now it is possible for SW to
switch ON other needed regulators.
Clocking scheme
There are two main clocks in the system: a 38.4 MHz RF clock produced by VCTCXO in the RF section, and a
32.768 kHz sleep clock produced by EM ASIC N2200 with an external crystal.
The RF clock is generated only when VCTCXO is powered on by an N2200 regulator. The regulator itself is
activated by SleepX signals from both RAP and the application processor. When both CPUs are on sleep, the
RF clock is stopped.
The RF clock is used by RAP that then provides (divided) 19.2 MHz SysClk further to the application processor.
Both RAP and the application processor have internal PLLs, which then create clock signals for other peripheral
devices/interfaces like memory card, SIM, CCP, I2C and memories.
32k Sleep Clock is always powered on after startup. Sleep clock is used by RAP and the application processor
for low-power operation.
SMPS Clk is a 2.4 MHz clock line from RAP to EM ASIC N2300 used for switch mode regulator synchronizing in
the active mode. In the deep sleep mode, when VCTCXO is off, this signal is set to '0'-state.
BT Clk is a 38.4 MHz signal from Tx ASIC N7501 to the Bluetooth system.
CLK600 is a 600 kHz signal from N2300 to APE VCORE SMPS. The clock source is an internal RC oscillator in
N2300 (during the power-up sequence) or RAP SMPS Clk divided by 4 after the power-up sequence.
RM-180
System Module
Nokia Customer Care
Issue 1
COMPANY CONFIDENTIAL
Page 9 –13
Copyright © 2006 Nokia. All rights reserved.
