
1-8 Technical Information
*Default
Keyboard Controller
The keyboard controller (80C51SL) supports a PS/2-style keyboard, mouse and security
features such as keyboard hot keys and password. Refer to Appendix A for keyboard inter-
face connector pin assignments.
The input clock cycle is 12 MHz. Data transmits between the controller and the keyboard
through a bidirectional serial interface. The controller receives serial data, checks for parity
errors, converts scan codes, and writes the data to the output buffer.
When data is written to the output buffer, the controller generates an interrupt (IRQ01 or
IRQ12) and requests the CPU to receive the data. The controller automatically adds an
even parity bit to the data sent and waits for a response. The device must acknowledge that
the data was successfully received by sending a response to the controller for each byte of
data received.
PCMCIA Controller (CL-PD6720)
The PCMCIA interface uses a standard Exchangeable Card Architecture (ExCA) connector
allowing the user to choose from an array of optional modem or network cards. The con-
troller interfaces with the ISA bus, PCMCIA card socket and configuration registers to
provide:
n
memory address mapping, I/O address mapping
n
power management for each PCMCIA card socket, controlled through power and
RESETDRV control registers
n
the elimination of interrupt conflicts using interrupt steering.
I/O Addressing
The CPU works in conjunction with I/O devices using I/O mapping. Refer to Table Section
1-6 for hex addresses.
Table Section 1-6 Versa S I/O Address Map
Address (Hex)
I/O Device Name
000-00F
DMA Controller 1
020-03F
Interrupt Controller 1
040-043
Timer 1
048-04B
Timer 2
060-064
Keyboard Controller
Summary of Contents for VERSA S
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