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12
µ
PD78F4225Y
4.2 Pins Other Than Port Pins (2/2)
Pin Name
I/O
Alternate Function
Function
WAIT
Input
P66
To insert wait state(s) when external memory is accessed
ASTB
Output
P67
Strobe output to externally latch address information output to ports
4 through 6 to access external memory
EXA
Output
P37
External access status output
RESET
Input
—
System reset input
X1
Input
—
To connect main system clock oscillation crystal
X2
—
XT1
Input
—
To connect subsystem clock oscillation crystal
XT2
—
ANI0-ANI7
Input
P10-P17
Analog voltage input for A/D converter
ANO0, ANO1
Output
P130, P131
Analog voltage output for D/A converter
AV
REF1
—
—
To apply reference voltage for D/A converter
AV
DD
Positive power supply for A/D converter. Connected to V
DD0
.
AV
SS
GND for A/D converter and D/A converter. Connected to V
SS0
.
V
DD0
Positive power supply for port block
V
SS0
GND potential for port block
V
DD1
Positive power supply (except port block)
V
SS1
GND potential (except port block)
TEST
V
PP
Directly connect this pin to V
SS
(this pin is for IC test).
V
PP
TEST
Sets flash memory programming mode.
To apply a high voltage when program is written or verified.
Summary of Contents for uPD78F4225Y
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