CHAPTER 5 CLOCK GENERATION CIRCUIT
User's Manual U11919EJ3V0UM00
86
5.3 Register Controlling Clock Generation Circuit
The clock generation circuit is controlled by the following register:
•
Processor clock control register (PCC)
(1)
Processor clock control register (PCC)
PCC sets CPU clock selection and the ratio of division.
PCC is set with a 1-bit or 8-bit memory manipulation instruction.
RESET input sets PCC to 02H.
Figure 5-2. Processor Clock Control Register Format
CPU Clock (f
CPU
) Selection
PCC1
0
1
f
X
(0.2 s)
f
X
/2
2
(0.8 s)
µ
µ
0
0
0
0
0
0
PCC1
0
PCC
7
6
5
4
Symbol
Address
After Reset
R/W
FFFBH
02H
R/W
3
2
1
0
Caution
Be sure to set bit 0 and bits 2 to 7 to 0.
Remarks 1. f
X
: System clock oscillation frequency
2. The parenthesized values apply to opration at f
X
= 5.0 MHz.
3. Minimum instruction execution time: 2 f
CPU
•
When f
CPU
= 0.2
µ
s : 0.4
µ
s
•
When f
CPU
= 0.8
µ
s : 1.6
µ
s
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