NEC UNIVERGE NEAX 2000 IPS, General Description Manual, Page: 16 / 191

CHAPTER 1 INTRODUCTION
UNIVERGE NEAX 2000 IPS General Description Page 12
Issue 5
Hardware Architecture
Hybrid System of IP (peer-to-peer connection) and TDM Switching
The UNIVERGE
NEAX
2000 IPS supports both pure IP switching (peer-to-peer connections) and
Time Division Switching (TDM). The pure IP switching is provided for communications
between DtermIPs and for CCIS/Remote PIM connections with another
UNIVERGE
NEAX
2000
IPS/ UNIVERGE
NEAX
IPS
DML
/ 2400 IPX. On the other hand, the TDM switching is provided
for communications between legacy stations/trunks. Connections between DtermIP/CCIS or
Remote PIM over IP and legacy stations/trunks are made via IP PADs, which converts packet-
based voice data to TDM-based voice data, and vice versa.
Powerful, One-board Main Processor (MP) with Integrated Functionality
The UNIVERGE
NEAX
2000 IPS Main Processor (MP) is the heart of pure IP connections and
TDM-based connections. The MP employs a high-speed CPU, which is equivalent with
Pentium. With this processing power and System On Chip (SOC) technology, the MP integrates
Device Registration Server (DRS), and AP01 (OAI) functions. Also, by means of today’s
advanced LSI technology, the MP card size is minimized and On-board Ethernet Interface card is
mounted on the MP without using an additional slot space in the PIM. This interface card is
linked with LAN for call control processing of DtermIP and inter-work with MATWorX and
OAI server.
The MP provides LAN control function, System-based Device Registration Server (DRS), Built-
in FP, Built-in OAI, Built-in SMDR, Built-in CCH-IPT, 33 MHz PCI BUS, Memory
(Basic/Expansion), TDSW (1024 CH × 1024 CH), 16-line CFT, PB Sender, Clock, PLO two
ports (Receiver Mode/Source Mode), two RS-232C Ports, two-line DAT (Recording duration: a
maximum of 128 seconds), DK, 4-line PB Receiver, Modem for remote maintenance (33.6
kbps), internal Music-on-Hold Tone, BUS Interface. BUS Interface functions as a driver/receiver
of various signals, adjusts gate delay timing and cable delay timing, monitors I/O Bus and PCM
BUS. One card is required per system.
Reduced Hardware with IP based Architecture
The DtermIPs connected to the LAN do not require DLC cards because they can be interfaced
directly with the LAN and connected with peer-to-peer basis. When the DtermIP is connected
to a station/trunk that is using TSW, the speech path between LAN and TSW is made via IP
PAD under the call processing control of the MP. The DtermIP can be expanded simply adding
the terminal itself and IP PAD if traffic volume is increased. With this system architecture, the
hardware such as DLC, PIM, Power Supply etc. is reduced and easy moves, adds, and changes
can be realized.
Standard TDM Hardware Peer to Peer IP Hardware
Line & Trunk Cards
Application Processors
Firmware Processors
SPN-8IPLA IP PAD
PZ-M606-A
PN-24IPLA IP PAD*
* The PN-24IPLA is a daughter board for the 8IPLA
when up to 32 IP PADs for desired.