Page 12
Circuit Description
NEC-FA150ATUA
9.8 List of CPU Pin Assignments
Port
Pin No Signal Name Initial Seeting Function
Remark
P9.4
1
Bright
~
Inverter Luminance Control
P9.3
2
Volume
~
Audio Volume Control
P9.2
3
Nc
~
~
P9.1
4
Nc
~
~
P9.0
5
Nc
~
~
6
Byte
~
ISP Byte Function
7
CNVss
~
Switches change between processor mode
P8.7
8
Nc
~
~
P8.6
9
Nc
~
~
10
Reset
L
Reset Signal at Lower Level with 20 Clock
Active L
11
Xout
~
uP Clock Output
12
Vss
~
GND
13
Xin
~
uP Clock Input
14
Vcc
~
uP_Vcc 3.3V
P8.5
15
NMI
~
uP Interrupt generator When Hi to Low
P8.4
16
Nc
~
~
P8.3
17
V1_Detect
~
VS_ASIC
P8.2
18
Nc
~
~
P8.1
19
H1_Detect
~
HS_ASIC
P8.0
20
NC
~
~
P7.7
21
DE_Detect
~
DDC_GND
P7.6
22
BLON
H
Inverter Enable Control
P7.5
23
Nc
~
~
P7.4
24
Nc
~
~
P7.3
25
Nc
~
~
P7.2
26
Nc
~
~
P7.1
27
DDC_SCL
~
uP_DDC_SCL
P7.0
28
DDC_SDA
~
uP_DDC_SDA
P6.7
29
TXD
~
ISP TXD
P6.6
30
RXD
~
ISP RXD
P6.5
31
SCLK
~
ISP SCLK
P6.4
32
BUSY
~
ISP BUSY
P6.3
33
SSI
~
uP_Clock Serial Data Input
P6.2
34
SSO
~
uP_Clock Serial Data Output
P6.1
35
SCK
~
uP_Clocled Serial clock Input