NEC LCD1550X-BK, Service Manual

Page: 26 / 209

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• Digital input signal presence judgment
For digital signals, the input signals are judged as the following table according to the state of
the SCDT signal (64-pin) input into the microcomputer (IC102) from the TMDS receiver
(IC500).
The TMDS output buffer power save signal/PD0 and internal logic power save signal/PD are
controlled as the following table according to the state of the front power switch, display input
signal (Ch) and SCDT signal.
If there is no digital signal input (SCDT = Lo), the display input signal (Ch) is analog (DVI-I (A)
or D-SUB) or the front power switch is OFF, the TMDS receiver's output buffer power is low-
ered (/PD0 = Lo) (excluding the SCDT output) by the /PD0 terminal. Normally, the input signal
presence is judged constantly. However, during the PMS mode, the microcomputer sends the
PWM signal to the /PD terminal (TMDS receiver power down at Lo) to control the power con-
sumption of TMDS receiver, so the power consumption can be reduced according to the On
duty (intermittent control).
(Note: OSM cannot be set for the mass-production F/W. The /PD PWM cycle is fixed to
500msec and to 50msec for the period /PD is Hi.)
The /PD PWM cycle and Hi interval are determined considering the fact that for the power
consumption during power save, the Hi interval rarely drops below 50msec. In addition, the
SCDT software filtering interval, feedback time from power save, time for SCDT to start after
DE is input, and the time to start counting after /PD is turned ON and PLL starts are also
considered.
* Software filtering is used to prevent malfunctioning in the PMS mode, considering the possi-
bility of noise in SCDT signal output of the TMDS receiver.
(Microcomputer input port)
SCDT
Hi
Lo
Results of input signal judgment
of digital signal
Input signal present
No input signal
(Microcomputer
input port)
SCDT
(Microcomputer
output port)
/ PDO
(Microcomputer
output port)
/ PD
(Microcomputer
output port)
P_TMDS
On
On
On
Off
Hi
Lo
Don’t
Care
Don’t
Care
Lo
DVI-I(D)
DVI-I(A)
D-Sub
Don’t
Care
Front power
SW
Display
input signal
(Ch)
Hi
Hi
Hi
FIRST,
LAST DETECT : Hi
NONE : Lo
Lo
Normal : Hi (TMDS receiver On)
During PMS : PWM (TMDS receiver intermittent On)
Normal : Hi (TMDS receiver On)
During PMS : PWM (TMDS receiver
intermittent On)
Normal : Hi (TMDS receiver On)
During PMS : PWM (TMDS receiver
intermittent On)
Lo (TMDS receiver Off)
Hi (TMDS receiver output enable)
Lo (TMDS receiver output open)
Lo (TMDS receiver output open)
Lo (TMDS receiver output open)
Lo (TMDS receiver output open)