CHAPTER 4 DIFFERENCES BETWEEN TARGET DEVICE AND TARGET INTERFACE CIRCUIT
User’s Manual U16115EJ2V0UM
35
(1) Signals directly input to or output from the emulation CPU
Refer to
Figure 4-1 Equivalent Circuit 1 of Emulation Circuit
. The following signals operate the same as in
the
µ
PD789306/789316 Subseries.
• S0 to S23
• COM0 to COM3
• CAPH, CAPL
• V
LC0
to V
LC2
Note that for the following signals, a 1 M
Ω
pull-down resistor and a 100
Ω
resistor are connected in series.
Signals related to ports 0 and 1 are connected to a 1 M
Ω
pull-down resistor in the IE-78K0S-NS or IE-78K0S-
NS-A.
• Signals related to port 0
• Signals related to port 1
• Signals related to port 2
• Signals related to port 3
A 33 k
Ω
pull-up resistor is connected to the following signals by setting the switch.
• Signals related to port 5
Figure 4-1. Equivalent Circuit 1 of Emulation Circuit
•
Probe side
(Target system)
•
IE system side
(IE-789306-NS-EM1)
S0 to S23
COM0 to COM3
CAPH, CAPL
V
LC0
to V
LC2
Port 0
Port 1
Port 2
Port 3
Port 5
S0 to S23
COM0 to COM3
CAPH, CAPL
V
LC0
to V
LC2
Port 0
Port 1
Port 2
Port 3
Port 5
100
Ω
100
Ω
1 M
Ω
33 k
Ω
SW1
LV
CC