
PN6280_Hardware Design
Copyright © JSC NIIMA PROGRESS and NAVIA LLC
7
2.2 Pin Definition
Table 2-1 PN6280 Pin description
Pin
NO.
Pin name
Type
Function Description
Power
domain
State
(1)
1.
GND
G
Ground
GND
2.
PWRKEY
I
Powerkey button
0
~
4.2V
Open
3.
SYSRSTB
I
System reset signal
DVDD18
Open
4.
GND
G
Ground
GND
5.
USB_DM
DIO
USB port differential data line
Open
6.
USB_DP
DIO
Open
7.
GND
G
Ground
GND
8.
USIM_DATA
I/O
USIM data
DVDD18
Open
9.
USIM_RST
O
USIM reset
DVDD18
Open
10.
USIM_CLK
O
USIM clock
DVDD18
Open
11.
USIM_VDD
P
USIM output voltage
1.8/3.0V
Open
12.
GND
G
Ground
GND
13.
PCM_CLK
I/O
PCM interface clock
DVDD18
Open
14.
PCM_SYNC
I/O
PCM interface sync
DVDD18
Open
15.
PCM_IN
I/O
PCM I/F data in
DVDD18
Open
16.
PCM_OUT
I/O
PCM I/F data out
DVDD18
Open
17.
GND
G
Ground
GND
18.
U1RXD
DI
UART1 receive data input
DVDD18
Open
19.
U1TXD
DO
UART1 transmit output
DVDD18
Open
20.
GND
G
Ground
GND
21.
WAKEIN
I/O
Host to set the module into sleep or wake
up the module from sleep
DVDD18
Open