SERDES Evaluation Kit DS99R105/106 USB Version 0.1 Users Manual
National Semiconductor Corporation
Date: 5/14/2008
Page 35 of 37
PRIMARY COMPONENT SIDE – LAYER 1
GROUND PLANE (VSS) – LAYER 2
POWER PLANE (VDD) – LAYER 3
SECONDARY COMP SIDE – LAYER 4
PRIMARY COMP SIDE – SOLDER MASK (LAYER 1)
SECONDARY COMP SIDE – SOLDER MASK (LAYER 4)