National Semiconductor NS32081-10, Manual

Page: 8 / 18

2.0 Architectural Description
(Continued)
TABLE 2-1. Series 32000 Family Addressing Modes
Encoding Mode Assembler Syntax Effective Address
REGISTER
00000 Register 0 R0 or F0 None: Operand is in the specified register.
00001 Register 1 R1 or F1
00010 Register 2 R2 or F2
00011 Register 3 R3 or F3
00100 Register 4 R4 or F4
00101 Register 5 R5 or F5
00110 Register 6 R6 or F6
00111 Register 7 R7 or F7
REGISTER RELATIVE
01000 Register 0 relative disp(R0) Disp
a
Register.
01001 Register 1 relative disp(R1)
01010 Register 2 relative disp(R2)
01011 Register 3 relative disp(R3)
01100 Register 4 relative disp(R4)
01101 Register 5 relative disp(R5)
01110 Register 6 relative disp(R6)
01111 Register 7 relative disp(R7)
MEMORY SPACE
11000 Frame memory disp(FP) Disp
a
Register; ‘‘SP’’ is either
11001 Stack memory disp(SP) SP0 or SP1, as selected in PSR.
11010 Static memory disp(SB)
11011 Program memory *
a
disp
MEMORY RELATIVE
10000 Frame memory relative disp2(disp1(FP)) Disp2
a
Pointer; Pointer found at
10001 Stack memory relative disp2(disp1(SP)) address Disp1
a
Register. ‘‘SP’’ is
10010 Static memory relative disp2(disp1(SB)) either SP0 or SP1, as selected in PSR.
IMMEDIATE
10100 Immediate value None: Operand is issued from
CPU instruction queue.
ABSOLUTE
10101 Absolute
@
disp Disp.
EXTERNAL
10110 External EXT (disp1)
a
disp2 Disp2
a
Pointer; Pointer is found
at Link Table Entry number Disp1.
TOP OF STACK
10111 Top of Stack TOS Top of current stack, using either
User or Interrupt Stack Pointer,
as selected in PSR. Automatic
Push/Pop included.
SCALED INDEX
11100 Index, bytes mode [ Rn:B ] Mode
a
Rn.
11101 Index, words mode [ Rn:W ] Mode
a
2
c
Rn.
11110 Index, double words mode
[
Rn:D
]
Mode
a
4
c
Rn.
11111 Index, quad words mode
[
Rn:Q
]
Mode
a
8
c
Rn.
‘‘Mode’’ and ‘‘n’’ are contained
within the Index Byte.
10011 (Reserved for Future Use)
8